On Mon, 3 Jun 2019 at 16:25, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > We forgot to set .has_alpha=true for the A+CCS formats when the code > started to consult .has_alpha. This manifests as A+CCS being treated > as X+CCS which means no per-pixel alpha blending. Fix the format > list appropriately. > > Cc: stable@xxxxxxxxxxxxxxx > Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Cc: Heinrich Fink <heinrich.fink@xxxxxxxxx> > Reported-by: Heinrich Fink <heinrich.fink@xxxxxxxxx> > Fixes: b20815255693 ("drm/i915: Add plane alpha blending support, v2.") > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index c3e2b1178d55..67d796f4747e 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2463,10 +2463,14 @@ static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier) > * main surface. > */ > static const struct drm_format_info ccs_formats[] = { > - { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, }, > - { .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, }, > - { .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, }, > - { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2, .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, }, > + { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 2, > + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, }, > + { .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 2, > + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, }, > + { .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 2, > + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, }, > + { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2, > + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, }, > }; > > static const struct drm_format_info * > -- > 2.21.0 > Just tested it on our image, fixes the bug and works for me. Thank you for the swift fix! _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx