Note that async flush also means things like VT-d IOTLB invalidation. See Bspec vol1c.4 "Render Engine Command Streamer", Section "ECOSKPD - Eco Scratch Pad". It doesn't seem to help in for any of our VT-d related bugs thoug. Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_display.c | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a7ef74a..5b23d5c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -583,6 +583,7 @@ #define BB_ADDR 0x02140 /* 8 bytes */ #define GFX_FLSH_CNTL 0x02170 /* 915+ only */ #define ECOSKPD 0x021d0 +#define ECO_ASYNC_FLUSH_FIX_REVERT (1<<7) #define ECO_GATING_CX_ONLY (1<<3) #define ECO_FLIP_DONE (1<<0) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dab2381..dce64d8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8510,6 +8510,9 @@ static void gen6_init_clock_gating(struct drm_device *dev) I915_WRITE(WM2_LP_ILK, 0); I915_WRITE(WM1_LP_ILK, 0); + I915_WRITE(ECOSKPD, (ECO_ASYNC_FLUSH_FIX_REVERT << 16) | + ECO_ASYNC_FLUSH_FIX_REVERT); + I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) | GEN6_BLBUNIT_CLOCK_GATE_DISABLE | -- 1.7.7.6
