On Wed, 05 Jun 2019, Matt Roper <matthew.d.roper@xxxxxxxxx> wrote: > On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote: >> On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote: >> > Unlike ICL, EHL's combo PHYs can support HBR3 data rates. Note that >> > this just extends the upper limit; we will continue to honor the max >> > data rate specified in the VBT in cases where it is lower than HBR3. >> > >> > Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx> >> >> Yes looks good to me. >> >> Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> >> >> Manasi > > Thanks for the quick review. CI looks happy too, so pushed to dinq. CI didn't actually report full IGT runs yet, just the BAT results. BR, Jani. > > > Matt > >> >> > --- >> > drivers/gpu/drm/i915/intel_dp.c | 1 + >> > 1 file changed, 1 insertion(+) >> > >> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> > index 24b56b2a76c8..b099a9dc28fd 100644 >> > --- a/drivers/gpu/drm/i915/intel_dp.c >> > +++ b/drivers/gpu/drm/i915/intel_dp.c >> > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp) >> > enum port port = dig_port->base.port; >> > >> > if (intel_port_is_combophy(dev_priv, port) && >> > + !IS_ELKHARTLAKE(dev_priv) && >> > !intel_dp_is_edp(intel_dp)) >> > return 540000; >> > >> > -- >> > 2.14.5 >> > >> > _______________________________________________ >> > Intel-gfx mailing list >> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
