Quoting Antonio Argenziano (2019-06-04 19:43:35) > > > On 04/06/19 09:29, Chris Wilson wrote: > > I told vecs0 to use vecs1 registers... > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > --- > > tests/i915/gem_ctx_shared.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c > > index 67ecd0953..069964546 100644 > > --- a/tests/i915/gem_ctx_shared.c > > +++ b/tests/i915/gem_ctx_shared.c > > @@ -544,9 +544,11 @@ static void independent(int i915, unsigned ring, unsigned flags) > > mmio_base = 0x22000; > > break; > > > > +#define GEN11_VECS0_BASE 0x1c8000 > > +#define GEN11_VECS1_BASE 0x1d8000 > > VECS1 coming next? > > > case I915_EXEC_VEBOX: > > There is a commented-out case for BSD, why is that? Because that really does require probing as may run on either engine, i.e. it even fails on bdw+ with my lazy coding. And being lazy I punted the issue for later. (Well I proposed asking the kernel and Joonas told me to read debugfs and I conveniently forgot all about it.) -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
