On Wed, 2019-05-29 at 07:21 -0700, Daniele Ceraolo Spurio wrote: > > On 5/28/19 11:48 PM, Saarinen, Jani wrote: > > Hi, > > > > > -----Original Message----- > > > From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] > > > On Behalf Of > > > Summers, Stuart > > > Sent: tiistai 28. toukokuuta 2019 21.33 > > > To: Navare, Manasi D <manasi.d.navare@xxxxxxxxx> > > > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > Subject: Re: [CI 0/5] Refactor to expand subslice > > > mask > > > > > > On Tue, 2019-05-28 at 11:32 -0700, Manasi Navare wrote: > > > > Pushed to dinq, thanks for the patches and the reviews! > > > > > > Thanks for the push Manasi and the reviews Daniele and others! > > > > This broke all the ICL systems because CI data was not looked that > > they did not actually even boot at all. > > All ICL's in BAT and whole ICL shards. > > > > Can we change the CI reply for the case where there are extra > missing > machines compared to the reference run from SUCCESS to WARNING or > something like that, so people have a clearer indication that > something > might have gone wrong? I agree here. I'm sure with time and experience these types of things will get easier to parse, but this was very unobvious to me when posting. I have no problem reworking, but would really appreciate a solution to this from the CI side to ensure we don't hit this type of thing in the future. Thanks, Stuart > > Daniele > > > > > > > > > -Stuart > > > > > > > > > > > Regards > > > > Manasi > > > > > > > > On Fri, May 24, 2019 at 08:40:17AM -0700, Stuart Summers wrote: > > > > > This patch series contains a few code clean-up patches, > > > > > followed by > > > > > a patch which changes the storage of the subslice mask to > > > > > better > > > > > match the userspace access through the > > > > > I915_QUERY_TOPOLOGY_INFO > > > > > ioctl. The index into the subslice_mask array is then > > > > > calculated: > > > > > slice * subslice stride + subslice index / 8 > > > > > > > > > > v2: fix i915_pm_sseu test failure > > > > > v3: no changes to patches in the series, just resending to > > > > > pick up > > > > > in CI correctly > > > > > v4: rebase > > > > > v5: fix header test > > > > > v6: address review comments from Jari > > > > > address minor checkpatch warning in existing code > > > > > use eu_stride for EU div-by-8 > > > > > v7: another rebase > > > > > v8: address review comments from Tvrtko and Daniele > > > > > v9: address review comments from Daniele > > > > > v10: add reviewed-by on last patch with minor suggested > > > > > change, > > > > > rebase, and repost for CI > > > > > > > > > > Stuart Summers (5): > > > > > drm/i915: Use local variable for SSEU info in GETPARAM > > > > > ioctl > > > > > drm/i915: Add macro for SSEU stride calculation > > > > > drm/i915: Move calculation of subslices per slice to new > > > > > function > > > > > drm/i915: Refactor sseu helper functions > > > > > drm/i915: Expand subslice mask > > > > > > > > > > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 24 ++- > > > > > drivers/gpu/drm/i915/gt/intel_engine_types.h | 30 ++-- > > > > > drivers/gpu/drm/i915/gt/intel_hangcheck.c | 3 +- > > > > > drivers/gpu/drm/i915/gt/intel_sseu.c | 62 +++++++ > > > > > drivers/gpu/drm/i915/gt/intel_sseu.h | 35 +++- > > > > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- > > > > > drivers/gpu/drm/i915/i915_debugfs.c | 46 ++--- > > > > > drivers/gpu/drm/i915/i915_drv.c | 15 +- > > > > > drivers/gpu/drm/i915/i915_gpu_error.c | 5 +- > > > > > drivers/gpu/drm/i915/i915_query.c | 15 +- > > > > > drivers/gpu/drm/i915/intel_device_info.c | 176 > > > > > +++++++++++-- > > > > > ------ > > > > > drivers/gpu/drm/i915/intel_device_info.h | 47 ----- > > > > > 12 files changed, 280 insertions(+), 180 deletions(-) > > > > > > > > > > -- > > > > > 2.21.0.5.gaeb582a983 > > > > > > > > > > _______________________________________________ > > > > > Intel-gfx mailing list > > > > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > >
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