On Thu, 16 May 2019, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Thu, May 16, 2019 at 03:55:25PM +0300, Jani Nikula wrote: >> On Thu, 16 May 2019, Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> wrote: >> > Op 16-05-2019 om 07:58 schreef Harish Chegondi: >> >> display_pipe_crc_irq_handler() skips the first CRC for all GPUs and the >> >> second CRC for GEN8+ GPUs. The second CRC is invalid even for BYT which >> >> is a GEN7 GPU. So, skip the second CRC even for GEN7 GPUs. >> >> >> >> Cc: Jani Nikula <jani.nikula@xxxxxxxxx> >> >> Cc: Tomi Sarvela <tomi.p.sarvela@xxxxxxxxx> >> >> Cc: Petri Latvala <petri.latvala@xxxxxxxxx> >> >> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> >> >> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> >> >> Signed-off-by: Harish Chegondi <harish.chegondi@xxxxxxxxx> >> >> References: https://bugs.freedesktop.org/show_bug.cgi?id=103191 >> >> --- >> >> drivers/gpu/drm/i915/i915_irq.c | 4 ++-- >> >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> >> >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c >> >> index 233211fde0ea..3809e9f7fae2 100644 >> >> --- a/drivers/gpu/drm/i915/i915_irq.c >> >> +++ b/drivers/gpu/drm/i915/i915_irq.c >> >> @@ -1775,11 +1775,11 @@ static void display_pipe_crc_irq_handler(struct drm_i915_private *dev_priv, >> >> * bonkers. So let's just wait for the next vblank and read >> >> * out the buggy result. >> >> * >> >> - * On GEN8+ sometimes the second CRC is bonkers as well, so >> >> + * On GEN7+ sometimes the second CRC is bonkers as well, so >> >> * don't trust that one either. >> >> */ >> >> if (pipe_crc->skipped <= 0 || >> >> - (INTEL_GEN(dev_priv) >= 8 && pipe_crc->skipped == 1)) { >> >> + (INTEL_GEN(dev_priv) >= 7 && pipe_crc->skipped == 1)) { >> >> pipe_crc->skipped++; >> >> spin_unlock(&pipe_crc->lock); >> >> return; >> > >> > I would be interested in the results, haswell is different from >> > VLV. Has it ever been observed on that platform? >> >> Good point. I looked at [1] which I presumed was on VLV, but it says >> nothing about HSW. > > This whole thing is just a pile of duct tape anyway. The reason(s) > for these funky crcs has never been properly analysed. I don't disagree. And this is partially why I was so eager to ack the patch at hand. Another strip of duct tape does no harm when you already have so much, and we can't hold this particular issue hostage to root cause the issues. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
