Given an immediate preemption event on re-enabling arbitration (MI_ARB_ON_OFF | MI_ARB_ENABLE) it appears that the HW may forget about the ongoing MI_USER_INTERRUPT, losing the interrupt in the process. If we happen to be waiting on that interrupt at the time, the system may then grind to a halt. My presumption is that there is an effective shadow inside the CS as it parses and buffers the commands, and if we push the MI_USER_INTERRUPT out of the immediate parse buffer it is not lost by the arbitration check. Testcase: igt/gem_concurrent_blit Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- Plausible? I need a few hours to confirm my hunch. -Chris --- drivers/gpu/drm/i915/gt/intel_lrc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 851e62ddcb87..526cb9231d58 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -2271,14 +2271,13 @@ static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs) request->fence.seqno, request->timeline->hwsp_offset, 0); + *cs++ = MI_USER_INTERRUPT; cs = gen8_emit_ggtt_write(cs, intel_engine_next_hangcheck_seqno(request->engine), I915_GEM_HWS_HANGCHECK_ADDR, MI_FLUSH_DW_STORE_INDEX); - - *cs++ = MI_USER_INTERRUPT; *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE; request->tail = intel_ring_offset(request, cs); @@ -2297,13 +2296,13 @@ static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) PIPE_CONTROL_DC_FLUSH_ENABLE | PIPE_CONTROL_FLUSH_ENABLE | PIPE_CONTROL_CS_STALL); + *cs++ = MI_USER_INTERRUPT; cs = gen8_emit_ggtt_write_rcs(cs, intel_engine_next_hangcheck_seqno(request->engine), I915_GEM_HWS_HANGCHECK_ADDR, PIPE_CONTROL_STORE_DATA_INDEX); - *cs++ = MI_USER_INTERRUPT; *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE; request->tail = intel_ring_offset(request, cs); -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
