On Fri, Apr 19, 2019 at 06:13:59PM +0100, Chris Wilson wrote: > Split the sideback declarations out of the ginormous i915_drv.h Ah, it was here all along :) Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/Makefile.header-test | 1 + > drivers/gpu/drm/i915/i915_debugfs.c | 1 + > drivers/gpu/drm/i915/i915_drv.h | 120 -------------------- > drivers/gpu/drm/i915/i915_sysfs.c | 2 + > drivers/gpu/drm/i915/intel_cdclk.c | 1 + > drivers/gpu/drm/i915/intel_display.c | 1 + > drivers/gpu/drm/i915/intel_dp.c | 2 + > drivers/gpu/drm/i915/intel_dpio_phy.c | 1 + > drivers/gpu/drm/i915/intel_dsi_vbt.c | 13 ++- > drivers/gpu/drm/i915/intel_hdmi.c | 1 + > drivers/gpu/drm/i915/intel_pm.c | 1 + > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + > drivers/gpu/drm/i915/intel_sideband.c | 2 + > drivers/gpu/drm/i915/intel_sideband.h | 130 ++++++++++++++++++++++ > drivers/gpu/drm/i915/vlv_dsi.c | 2 +- > drivers/gpu/drm/i915/vlv_dsi_pll.c | 4 +- > 16 files changed, 157 insertions(+), 126 deletions(-) > create mode 100644 drivers/gpu/drm/i915/intel_sideband.h > > diff --git a/drivers/gpu/drm/i915/Makefile.header-test b/drivers/gpu/drm/i915/Makefile.header-test > index c1c391816fa7..20ee9321dbb3 100644 > --- a/drivers/gpu/drm/i915/Makefile.header-test > +++ b/drivers/gpu/drm/i915/Makefile.header-test > @@ -31,6 +31,7 @@ header_test := \ > intel_pipe_crc.h \ > intel_pm.h \ > intel_psr.h \ > + intel_sideband.h \ > intel_sdvo.h \ > intel_sprite.h \ > intel_tv.h \ > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 93fd82a6ac2b..850ad072d1e0 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -41,6 +41,7 @@ > #include "intel_hdmi.h" > #include "intel_pm.h" > #include "intel_psr.h" > +#include "intel_sideband.h" > > static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) > { > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 6eb12f11ab65..f4879fb41aa6 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -541,11 +541,6 @@ enum intel_pch { > PCH_ICP, /* Ice Lake PCH */ > }; > > -enum intel_sbi_destination { > - SBI_ICLK, > - SBI_MPHY, > -}; > - > #define QUIRK_LVDS_SSC_DISABLE (1<<1) > #define QUIRK_INVERT_BRIGHTNESS (1<<2) > #define QUIRK_BACKLIGHT_PRESENT (1<<3) > @@ -3442,121 +3437,6 @@ int sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, u32 mbox, > int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request, > u32 reply_mask, u32 reply, int timeout_base_ms); > > -/* intel_sideband.c */ > - > -enum { > - VLV_IOSF_SB_BUNIT, > - VLV_IOSF_SB_CCK, > - VLV_IOSF_SB_CCU, > - VLV_IOSF_SB_DPIO, > - VLV_IOSF_SB_FLISDSI, > - VLV_IOSF_SB_GPIO, > - VLV_IOSF_SB_NC, > - VLV_IOSF_SB_PUNIT, > -}; > - > -void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports); > -u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg); > -void vlv_iosf_sb_write(struct drm_i915_private *i915, > - u8 port, u32 reg, u32 val); > -void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports); > - > -static inline void vlv_bunit_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); > -} > - > -u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg); > -void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val); > - > -static inline void vlv_bunit_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); > -} > - > -static inline void vlv_cck_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); > -} > - > -u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg); > -void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val); > - > -static inline void vlv_cck_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); > -} > - > -static inline void vlv_ccu_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU)); > -} > - > -u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg); > -void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val); > - > -static inline void vlv_ccu_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU)); > -} > - > -static inline void vlv_dpio_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO)); > -} > - > -u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg); > -void vlv_dpio_write(struct drm_i915_private *i915, > - enum pipe pipe, int reg, u32 val); > - > -static inline void vlv_dpio_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO)); > -} > - > -static inline void vlv_flisdsi_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_FLISDSI)); > -} > - > -u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg); > -void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val); > - > -static inline void vlv_flisdsi_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_FLISDSI)); > -} > - > -static inline void vlv_nc_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC)); > -} > - > -u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr); > - > -static inline void vlv_nc_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC)); > -} > - > -static inline void vlv_punit_get(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT)); > -} > - > -u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr); > -int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val); > - > -static inline void vlv_punit_put(struct drm_i915_private *i915) > -{ > - vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT)); > -} > - > -u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg, > - enum intel_sbi_destination destination); > -void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value, > - enum intel_sbi_destination destination); > - > /* intel_dpio_phy.c */ > void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port, > enum dpio_phy *phy, enum dpio_channel *ch); > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > index 0952d6a70e1f..9bb3a15e4683 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -29,7 +29,9 @@ > #include <linux/module.h> > #include <linux/stat.h> > #include <linux/sysfs.h> > + > #include "intel_drv.h" > +#include "intel_sideband.h" > #include "i915_drv.h" > > static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev) > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c > index 2bc5d3227a24..cf9c916e8d49 100644 > --- a/drivers/gpu/drm/i915/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > @@ -23,6 +23,7 @@ > > #include "intel_cdclk.h" > #include "intel_drv.h" > +#include "intel_sideband.h" > > /** > * DOC: CDCLK / RAWCLK > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 16c77d11f44b..035506417bdd 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -67,6 +67,7 @@ > #include "intel_pm.h" > #include "intel_psr.h" > #include "intel_sdvo.h" > +#include "intel_sideband.h" > #include "intel_sprite.h" > #include "intel_tv.h" > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 4fc25dcc97d4..08d92570f17f 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -31,6 +31,7 @@ > #include <linux/reboot.h> > #include <linux/slab.h> > #include <linux/types.h> > + > #include <asm/byteorder.h> > > #include <drm/drm_atomic_helper.h> > @@ -53,6 +54,7 @@ > #include "intel_lvds.h" > #include "intel_panel.h" > #include "intel_psr.h" > +#include "intel_sideband.h" > > #define DP_DPRX_ESI_LEN 14 > > diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c > index c784f3daaf51..d80887b5e234 100644 > --- a/drivers/gpu/drm/i915/intel_dpio_phy.c > +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c > @@ -23,6 +23,7 @@ > > #include "intel_dp.h" > #include "intel_drv.h" > +#include "intel_sideband.h" > > /** > * DOC: DPIO > diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c > index 2304488f2d35..fbed9064ac7e 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c > +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c > @@ -24,18 +24,23 @@ > * > */ > > -#include <drm/drm_crtc.h> > -#include <drm/drm_edid.h> > -#include <drm/i915_drm.h> > #include <linux/gpio/consumer.h> > #include <linux/mfd/intel_soc_pmic.h> > #include <linux/slab.h> > -#include <video/mipi_display.h> > + > #include <asm/intel-mid.h> > #include <asm/unaligned.h> > + > +#include <drm/drm_crtc.h> > +#include <drm/drm_edid.h> > +#include <drm/i915_drm.h> > + > +#include <video/mipi_display.h> > + > #include "i915_drv.h" > #include "intel_drv.h" > #include "intel_dsi.h" > +#include "intel_sideband.h" > > #define MIPI_TRANSFER_MODE_SHIFT 0 > #define MIPI_VIRTUAL_CHANNEL_SHIFT 1 > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index 8b72365f9309..d2b3b32ea159 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -50,6 +50,7 @@ > #include "intel_lspcon.h" > #include "intel_sdvo.h" > #include "intel_panel.h" > +#include "intel_sideband.h" > > static struct drm_device *intel_hdmi_to_dev(struct intel_hdmi *intel_hdmi) > { > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index df2d8f916e5d..9a810d0683f7 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -38,6 +38,7 @@ > #include "intel_fbc.h" > #include "intel_pm.h" > #include "intel_sprite.h" > +#include "intel_sideband.h" > #include "../../../platform/x86/intel_ips.h" > > /** > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index a80ff35f6c81..166f162a7d51 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -37,6 +37,7 @@ > #include "intel_csr.h" > #include "intel_dp.h" > #include "intel_drv.h" > +#include "intel_sideband.h" > > /** > * DOC: runtime pm > diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c > index 457b8cad5494..5c3ae5185a01 100644 > --- a/drivers/gpu/drm/i915/intel_sideband.c > +++ b/drivers/gpu/drm/i915/intel_sideband.c > @@ -24,6 +24,8 @@ > > #include <asm/iosf_mbi.h> > > +#include "intel_sideband.h" > + > #include "i915_drv.h" > #include "intel_drv.h" > > diff --git a/drivers/gpu/drm/i915/intel_sideband.h b/drivers/gpu/drm/i915/intel_sideband.h > new file mode 100644 > index 000000000000..9d36bdc17955 > --- /dev/null > +++ b/drivers/gpu/drm/i915/intel_sideband.h > @@ -0,0 +1,130 @@ > +/* SPDX-License-Identifier: MIT */ > + > +#ifndef _INTEL_SIDEBAND_H_ > +#define _INTEL_SIDEBAND_H_ > + > +#include <linux/bitops.h> > +#include <linux/types.h> > + > +struct drm_i915_private; > +enum pipe; > + > +enum intel_sbi_destination { > + SBI_ICLK, > + SBI_MPHY, > +}; > + > +enum { > + VLV_IOSF_SB_BUNIT, > + VLV_IOSF_SB_CCK, > + VLV_IOSF_SB_CCU, > + VLV_IOSF_SB_DPIO, > + VLV_IOSF_SB_FLISDSI, > + VLV_IOSF_SB_GPIO, > + VLV_IOSF_SB_NC, > + VLV_IOSF_SB_PUNIT, > +}; > + > +void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports); > +u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg); > +void vlv_iosf_sb_write(struct drm_i915_private *i915, > + u8 port, u32 reg, u32 val); > +void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports); > + > +static inline void vlv_bunit_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); > +} > + > +u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg); > +void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val); > + > +static inline void vlv_bunit_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); > +} > + > +static inline void vlv_cck_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); > +} > + > +u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg); > +void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val); > + > +static inline void vlv_cck_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); > +} > + > +static inline void vlv_ccu_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU)); > +} > + > +u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg); > +void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val); > + > +static inline void vlv_ccu_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU)); > +} > + > +static inline void vlv_dpio_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO)); > +} > + > +u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg); > +void vlv_dpio_write(struct drm_i915_private *i915, > + enum pipe pipe, int reg, u32 val); > + > +static inline void vlv_dpio_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO)); > +} > + > +static inline void vlv_flisdsi_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_FLISDSI)); > +} > + > +u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg); > +void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val); > + > +static inline void vlv_flisdsi_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_FLISDSI)); > +} > + > +static inline void vlv_nc_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC)); > +} > + > +u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr); > + > +static inline void vlv_nc_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC)); > +} > + > +static inline void vlv_punit_get(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT)); > +} > + > +u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr); > +int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val); > + > +static inline void vlv_punit_put(struct drm_i915_private *i915) > +{ > + vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT)); > +} > + > +u32 intel_sbi_read(struct drm_i915_private *i915, u16 reg, > + enum intel_sbi_destination destination); > +void intel_sbi_write(struct drm_i915_private *i915, u16 reg, u32 value, > + enum intel_sbi_destination destination); > + > +#endif /* _INTEL_SIDEBAND_H */ > diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c > index dc1839bfde3e..b4c658334d04 100644 > --- a/drivers/gpu/drm/i915/vlv_dsi.c > +++ b/drivers/gpu/drm/i915/vlv_dsi.c > @@ -30,13 +30,13 @@ > #include <drm/drm_crtc.h> > #include <drm/drm_edid.h> > #include <drm/drm_mipi_dsi.h> > -#include <drm/i915_drm.h> > > #include "i915_drv.h" > #include "intel_connector.h" > #include "intel_drv.h" > #include "intel_dsi.h" > #include "intel_panel.h" > +#include "intel_sideband.h" > > /* return pixels in terms of txbyteclkhs */ > static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count, > diff --git a/drivers/gpu/drm/i915/vlv_dsi_pll.c b/drivers/gpu/drm/i915/vlv_dsi_pll.c > index 25b811174f5c..99cc3e2e9c2c 100644 > --- a/drivers/gpu/drm/i915/vlv_dsi_pll.c > +++ b/drivers/gpu/drm/i915/vlv_dsi_pll.c > @@ -26,9 +26,11 @@ > */ > > #include <linux/kernel.h> > -#include "intel_drv.h" > + > #include "i915_drv.h" > +#include "intel_drv.h" > #include "intel_dsi.h" > +#include "intel_sideband.h" > > static const u16 lfsr_converts[] = { > 426, 469, 234, 373, 442, 221, 110, 311, 411, /* 62 - 70 */ > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx