On Wed, Apr 17, 2019 at 07:33:24PM +0530, Swati Sharma wrote:
> v4: -Renamed intel_get_color_config to intel_color_get_config [Jani]
> -Added the user early on such that support for get_color_config()
> can be added platform by platform incrementally [Jani]
>
> Signed-off-by: Swati Sharma <swati2.sharma@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f29a348..0715b4e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8275,6 +8275,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->cgm_mode = I915_READ(CGM_PIPE_MODE(crtc->pipe));
>
> i9xx_get_pipe_color_config(pipe_config);
> + intel_color_get_config(pipe_config);
>
> if (INTEL_GEN(dev_priv) < 4)
> pipe_config->double_wide = tmp & PIPECONF_DOUBLE_WIDE;
> @@ -9348,6 +9349,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->csc_mode = I915_READ(PIPE_CSC_MODE(crtc->pipe));
>
> i9xx_get_pipe_color_config(pipe_config);
> + intel_color_get_config(pipe_config);
>
> if (I915_READ(PCH_TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
> struct intel_shared_dpll *pll;
> @@ -10011,6 +10013,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->csc_enable = true;
> } else {
> i9xx_get_pipe_color_config(pipe_config);
> + intel_color_get_config(pipe_config);
That's not the right place for it if you want to cover all the
platforms.
> }
>
> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> --
> 1.9.1
--
Ville Syrjälä
Intel
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