✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/4] drm/i915/bdw+: Move misc display IRQ handling to it own function

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== Series Details ==

Series: series starting with [v4,1/4] drm/i915/bdw+: Move misc display IRQ handling to it own function
URL   : https://patchwork.freedesktop.org/series/59672/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
9a6f3b42a779 drm/i915/bdw+: Move misc display IRQ handling to it own function
7c059b623995 drm/i915: Add _TRANS2()
-:29: WARNING:LONG_LINE: line over 100 characters
#29: FILE: drivers/gpu/drm/i915/i915_reg.h:254:
+					 INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \

total: 0 errors, 1 warnings, 0 checks, 13 lines checked
b92d121924eb drm/i915: Make PSR registers relative to transcoders
-:96: WARNING:LONG_LINE: line over 100 characters
#96: FILE: drivers/gpu/drm/i915/i915_reg.h:262:
+#define _TRANS2_PSR(reg)	(_TRANS2(dev_priv->psr.transcoder, (reg)) - dev_priv->psr.mmio_base_adjust)

-:134: WARNING:LONG_LINE_COMMENT: line over 100 characters
#134: FILE: drivers/gpu/drm/i915/i915_reg.h:4272:
+#define EDP_PSR_AUX_DATA(i)			_MMIO(_TRANS2_PSR(_SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

-:189: WARNING:LONG_LINE: line over 100 characters
#189: FILE: drivers/gpu/drm/i915/i915_reg.h:4368:
+#define _PSR2_SU_STATUS(index)		_MMIO(_TRANS2(dev_priv->psr.transcoder, _PSR2_SU_STATUS_A) + (index) * 4)

total: 0 errors, 3 warnings, 0 checks, 149 lines checked
f3e8eb0c781a drm/i915: Add transcoder parameter to PSR registers macros
-:113: WARNING:LONG_LINE: line over 100 characters
#113: FILE: drivers/gpu/drm/i915/i915_reg.h:4272:
+#define EDP_PSR_AUX_DATA(trans, i)		_MMIO(_TRANS2_PSR(trans, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

total: 0 errors, 1 warnings, 0 checks, 252 lines checked

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