On Thu, Mar 22, 2012 at 07:16, Daniel Vetter <daniel at ffwll.ch> wrote: > On Wed, Mar 21, 2012 at 10:09:58PM -0300, Eugeni Dodonov wrote: > > We don't have those bits on Haswell anymore, so do not set them. > > > > Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com> > > Hm, how is 6bpp dithering supposed to work now, when e.g. a lame dp link > can't handle more due to bandwidth issues? > It is handled when configuring DDI link instead now. So same functionality, but in different place. I also noticed that this my patch ended up in a wrong place - in i9xx_crtc_mode_set instead of ironlake_crtc_mode_set; I'll have to rework it anyway. Duh... -- Eugeni Dodonov <http://eugeni.dodonov.net/> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20120322/d236d1ed/attachment.htm>
