On Wed, 21 Mar 2012 22:10:12 -0300, Eugeni Dodonov <eugeni.dodonov at intel.com> wrote: > This logs all the registers and SBI accesses as they happen. > > Note that it is not supposed to go into the final patch series. But there > are too many subtle changes in both HSW and LPT that are much easier to > spot with this extra debugging when attaching a dmesg output in case of > problems. > > In other words, this is ugly, but if you run into an issue and send me > dmesg with those included, my chances of investigating the problems will > increase exponentially. This should already by covered by the tracepoints. I guess you just lacked the magic patch to enable ftrace on module load. 1289311867-10096-1-git-send-email-chris at chris-wilson.co.uk I was hoping that since Steven Rostedt agreed and seemed to convince Rusty as well, he would pick it up... So it could do with some love. -Chris -- Chris Wilson, Intel Open Source Technology Centre
