== Series Details == Series: series starting with [v3,1/5] drm/i915/bdw+: Move misc display IRQ handling to it own function URL : https://patchwork.freedesktop.org/series/59534/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8041c9d42fca drm/i915/bdw+: Move misc display IRQ handling to it own function 37ae8a55e70a drm/i915/psr: Remove partial PSR support on multiple transcoders 0e2fc9be5d0b drm/i915: Add _TRANS2() -:29: WARNING:LONG_LINE: line over 100 characters #29: FILE: drivers/gpu/drm/i915/i915_reg.h:254: + INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \ total: 0 errors, 1 warnings, 0 checks, 13 lines checked ef2149c8558b drm/i915: Make PSR registers relative to transcoders -:95: WARNING:LONG_LINE: line over 100 characters #95: FILE: drivers/gpu/drm/i915/i915_reg.h:4219: +#define _TRANS2_PSR(reg) (_TRANS2(dev_priv->psr.transcoder, (reg)) - dev_priv->psr.mmio_base_adjust) -:121: WARNING:LONG_LINE_COMMENT: line over 100 characters #121: FILE: drivers/gpu/drm/i915/i915_reg.h:4268: +#define EDP_PSR_AUX_DATA(i) _MMIO(_TRANS2_PSR(_SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */ total: 0 errors, 2 warnings, 0 checks, 153 lines checked eff3cb77d936 drm/i915: Add transcoder parameter to PSR registers macros -:109: WARNING:LONG_LINE: line over 100 characters #109: FILE: drivers/gpu/drm/i915/i915_reg.h:4268: +#define EDP_PSR_AUX_DATA(trans, i) _MMIO(_TRANS2_PSR(trans, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */ total: 0 errors, 1 warnings, 0 checks, 269 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
