On Mon, Apr 15, 2019 at 05:03:09PM +0100, Chris Wilson wrote: > Quoting Patchwork (2019-04-15 16:21:30) > > == Series Details == > > > > Series: drm/i915: Enable eLLC caching of display buffers for SKL+ > > URL : https://patchwork.freedesktop.org/series/59502/ > > State : success > > > > == Summary == > > > > CI Bug Log - changes from CI_DRM_5934 -> Patchwork_12799 > > ==================================================== > > > > Summary > > ------- > > > > **SUCCESS** > > > > No regressions found. > > How good is our testing for detecting cacheline dirt from rendering? > > Now, it's pretty easy for us to test, you fire up a desktop and wiggle a > few windows, but how well automated is it in CI? Not well. Rendercopy sets MOCS to 0 which means UC, so it won't test this at all. We should probably change that. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
