Quoting Mika Kuoppala (2019-04-12 16:37:21) > If the engine says it is ready for reset, it is ready > so avoid further dancing and proceed. > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reset.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c > index 68875ba43b8d..cde1a5309336 100644 > --- a/drivers/gpu/drm/i915/i915_reset.c > +++ b/drivers/gpu/drm/i915/i915_reset.c > @@ -490,8 +490,13 @@ static int gen11_reset_engines(struct drm_i915_private *i915, > static int gen8_engine_reset_prepare(struct intel_engine_cs *engine) > { > struct intel_uncore *uncore = engine->uncore; > + u32 ctl; > int ret; > > + ctl = intel_uncore_read_fw(uncore, RING_RESET_CTL(engine->mmio_base)); > + if (ctl & RESET_CTL_READY_TO_RESET) > + return 0; > + Would seem to not matter atm, but it does make the next patch easier. How about pulling the i915_reg_t into this, so the second is more about merging the CAT_ERROR handling? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx