Quoting Tvrtko Ursulin (2019-04-05 10:46:19) > > On 29/03/2019 13:40, Chris Wilson wrote: > > +static int gen9_emit_bb_start(struct i915_request *rq, > > + u64 offset, u32 len, > > + const unsigned int flags) > > +{ > > + u32 *cs; > > + > > + cs = intel_ring_begin(rq, 6); > > + if (IS_ERR(cs)) > > + return PTR_ERR(cs); > > + > > *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE; > > > > /* FIXME(BDW): Address space and security selectors. */ > > This comment can now be removed. I didn't check, but I presumed gen9+ still has those bits which we were ignoring. However, if we ever get around to looking at it, the comment in gen8 should suffice. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx