Certain eDP panels fail to link train with optimized settings for link rate and lane count and need the max link parameters to be used for link training to pass. So in on link training failure for eDP, retry the link training with max link parameters first since this tends to fix link failures on most eDP 1.4 panels Suggested-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Albert Astals Cid <aacid@xxxxxxx> Cc: Emanuele Panigati <ilpanich@xxxxxxxxx> Cc: Ralgor <ralgorfdb@xxxxxxxxxxxxx> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 36 ++++++++++++++++++++------------ drivers/gpu/drm/i915/intel_drv.h | 3 +++ 2 files changed, 26 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 72c49070ed14..d65d1a9338d6 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -463,6 +463,14 @@ static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp, return true; } +static bool intel_dp_uses_max_link_params(struct intel_dp*, + int link_rate, + u8 lane_count) +{ + return link_rate == intel_dp->max_link_rate && + lane_count == intel_dp->max_link_lane_count; +} + int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, int link_rate, u8 lane_count) { @@ -471,24 +479,23 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, index = intel_dp_rate_index(intel_dp->common_rates, intel_dp->num_common_rates, link_rate); - if (index > 0) { - if (intel_dp_is_edp(intel_dp) && - !intel_dp_can_link_train_fallback_for_edp(intel_dp, - intel_dp->common_rates[index - 1], - lane_count)) { + + if (intel_dp_is_edp(intel_dp)) { + if (!intel_dp_uses_max_link_params) { + intel_dp->retry_with_max_link_params = true; + DRM_DEBUGS_KMS("Retrying Link training for eDP with max link parameters\n"); + return 0; + } else if (!intel_dp_can_link_train_fallback_for_edp(intel_dp, + intel_dp->common_rates[index - 1], + lane_count)) { DRM_DEBUG_KMS("Retrying Link training for eDP with same parameters\n"); return 0; } + } + if (index > 0) { intel_dp->max_link_rate = intel_dp->common_rates[index - 1]; intel_dp->max_link_lane_count = lane_count; } else if (lane_count > 1) { - if (intel_dp_is_edp(intel_dp) && - !intel_dp_can_link_train_fallback_for_edp(intel_dp, - intel_dp_max_common_rate(intel_dp), - lane_count >> 1)) { - DRM_DEBUG_KMS("Retrying Link training for eDP with same parameters\n"); - return 0; - } intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); intel_dp->max_link_lane_count = lane_count >> 1; } else { @@ -2028,7 +2035,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, limits.min_bpp = 6 * 3; limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config); - if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) { + if ((intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) || + intel_dp->retry_with_max_link_params) { /* * Use the maximum clock and number of lanes the eDP panel * advertizes being capable of. The eDP 1.3 and earlier panels @@ -5432,6 +5440,8 @@ intel_dp_detect(struct drm_connector *connector, /* Initial max link rate */ intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); + intel_dp->retry_with_max_link_params = false; + intel_dp->reset_link_params = false; } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index f8c7b291fdc3..c3cf702c1cba 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1327,6 +1327,9 @@ struct intel_dp { /* Display stream compression testing */ bool force_dsc_en; + + /* Some panels need max link params for link training */ + bool retry_with_max_link_params; }; enum lspcon_vendor { -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
