On Wed, 2019-04-03 at 10:00 +0530, kiran.s.kumar@xxxxxxxxx wrote:
> From: Kiran Kumar S <kiran.s.kumar@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
>
> As per the display workaround #1200, FBC needs wait for vblank before
> enabling and before disabling FBC.
>
> In some cases, depending on whether FBC was compressing in that
> frame,
> several control signals in the compression engine also will fail to
> properly
> recognize the final segment of the frame as a result of the missing
> last
> pixel indication. As a result of this, we're seeing corrupted cache
> line/compression indicators after FBC re-enables which causes
> underruns or
> corruption when they're used to decompress.
>
> WA sequence as below:
> 1) Display enables plane 1A
> 2) Wait for 1 vblank
> 3) FBC gets enabled
> 4) Wait for 1 VBLANK
> 5) Turn off FBC
>
> In GLK Chrome OS, if FBC is enabled by default, few top lines on the
> screen
> got corrupted. With the above WA, issue was resolved.
>
> Change-Id: I2465610bb0a82df99e5c53b1eb4ed74565996b1e
> Signed-off-by: Kiran Kumar S <
> kiran.s.kumar@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 8576a7f799f2..5118a36782eb 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13207,8 +13207,11 @@ static void intel_update_crtc(struct
> drm_crtc *crtc,
>
> if (pipe_config->update_pipe && !pipe_config->enable_fbc)
> intel_fbc_disable(intel_crtc);
> - else if (new_plane_state)
> + else if (new_plane_state) {
> + /* Display WA #1200: GLK */
> + intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
Wait a vblank of partially changed state? That is not a good idea at
all.
Also it would wait a vblank even if FBC is not enabled.
> intel_fbc_enable(intel_crtc, pipe_config,
> new_plane_state);
> + }
>
> intel_begin_crtc_commit(crtc, old_crtc_state);
>
> @@ -13419,6 +13422,8 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
>
> dev_priv-
> >display.crtc_disable(old_intel_crtc_state, state);
> intel_crtc->active = false;
> + /* Display WA #1200: GLK */
> + intel_wait_for_vblank(dev_priv, intel_crtc-
> >pipe);
> intel_fbc_disable(intel_crtc);
> intel_disable_shared_dpll(old_intel_crtc_state)
> ;
>
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