implemented context submission pv optimizaiton within GVTg.
GVTg to read context submission data (elsp_data) from the shared_page
directly without trap cost and eliminate execlist HW behavior emulation
without injecting context switch interrupt to guest under PV
submisison mechanism.
v0: RFC
v1: rebase
v2: rebase
v3: report pv context submission cap and handle VGT_G2V_ELSP_SUBMIT
g2v pv notification.
v4: eliminate execlist HW emulation and don't inject context switch
interrupt to guest under PV submisison mechanism.
Signed-off-by: Xiaolin Zhang <xiaolin.zhang@xxxxxxxxx>
---
drivers/gpu/drm/i915/gvt/execlist.c | 6 ++++++
drivers/gpu/drm/i915/gvt/handlers.c | 32 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/gvt/vgpu.c | 1 +
3 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
index 1a93472..e68f1d4b 100644
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -382,6 +382,9 @@ static int prepare_execlist_workload(struct intel_vgpu_workload *workload)
int ring_id = workload->ring_id;
int ret;
+ if (VGPU_PVCAP(vgpu, PV_SUBMISSION))
+ return 0;
+
if (!workload->emulate_schedule_in)
return 0;
@@ -429,6 +432,9 @@ static int complete_execlist_workload(struct intel_vgpu_workload *workload)
goto out;
}
+ if (VGPU_PVCAP(vgpu, PV_SUBMISSION))
+ goto out;
+
ret = emulate_execlist_ctx_schedule_out(execlist, &workload->ctx_desc);
out:
intel_vgpu_unpin_mm(workload->shadow_mm);
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 2b4c686..cbba77c 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1182,6 +1182,35 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
return 0;
}
+static int intel_vgpu_g2v_pv_elsp_submit(struct intel_vgpu *vgpu)
+{
+ struct intel_vgpu_execlist *execlist;
+ u32 ring_id_off;
+ int ring_id;
+ u32 descs_off;
+
+ int ret = -EINVAL;
+
+ if (!VGPU_PVCAP(vgpu, PV_SUBMISSION))
+ return ret;
+
+ ring_id_off = offsetof(struct gvt_shared_page, ring_id);
+ if (intel_gvt_read_shared_page(vgpu, ring_id_off, &ring_id, 4))
+ return ret;
+
+ if (WARN_ON(ring_id < 0 || ring_id >= I915_NUM_ENGINES))
+ return ret;
+
+ execlist = &vgpu->submission.execlist[ring_id];
+
+ descs_off = offsetof(struct gvt_shared_page, descs);
+ if (intel_gvt_read_shared_page(vgpu, descs_off,
+ &execlist->elsp_dwords.data, 8 * EXECLIST_MAX_PORTS))
+ return ret;
+
+ return intel_vgpu_submit_execlist(vgpu, ring_id);
+}
+
static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification)
{
intel_gvt_gtt_type_t root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY;
@@ -1221,6 +1250,9 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification)
case VGT_G2V_PPGTT_L4_CLEAR:
ret = intel_vgpu_g2v_pv_ppgtt_clear_4lvl(vgpu, pdps);
break;
+ case VGT_G2V_PV_SUBMISSION:
+ ret = intel_vgpu_g2v_pv_elsp_submit(vgpu);
+ break;
case VGT_G2V_EXECLIST_CONTEXT_CREATE:
case VGT_G2V_EXECLIST_CONTEXT_DESTROY:
case 1: /* Remove this in guest driver. */
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index bc7387e..c71aaf6 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -51,6 +51,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
if (!intel_vtd_active())
vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) = PV_PPGTT_UPDATE;
+ vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) |= PV_SUBMISSION;
vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
vgpu_aperture_gmadr_base(vgpu);
--
2.7.4
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