Quoting Daniele Ceraolo Spurio (2019-03-25 21:49:40) > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h > index a02c92dac5da..e58d6f04177b 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -29,23 +29,44 @@ struct drm_printer; > #define CACHELINE_BYTES 64 > #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32)) > > -#define I915_READ_TAIL(engine) I915_READ(RING_TAIL((engine)->mmio_base)) > -#define I915_WRITE_TAIL(engine, val) I915_WRITE(RING_TAIL((engine)->mmio_base), val) > +/* > + * The register defines to be used with the following macros need to accept a > + * base param, e.g: > + * > + * REG_FOO(base) _MMIO((base) + <relative offset>) > + * ENGINE_READ(engine, REG_FOO); > + * > + * register arrays are to be defined and accessed as follows: > + * > + * REG_BAR(base, i) _MMIO((base) + <relative offset> + (i) * <shift>) > + * ENGINE_READ_IDX(engine, REG_BAR, i) > + */ > + > +#define __ENGINE_REG_OP(op__, engine__, ...) \ > + intel_uncore_##op__((engine__)->uncore, __VA_ARGS__) > + > +#define __ENGINE_READ_OP(op__, engine__, reg__) \ > + __ENGINE_REG_OP(op__, (engine__), reg__((engine__)->mmio_base)) I'm warming to ENGINE_READ/WRITE. I must admit I was hoping to lose the macros and all the shouting. I was just stopping by here to say, now would be the perfect opportunity to split this out into intel_engine_reg.h ? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
