Hi Dave & Daniel, First batch of features for 5.2, tagged last week. Most notably there are a lot of Icelake fixes that finally lead to removal of alpha_support protection for it. We're also adding Cometlake PCI IDs (Gen9 ~= Coffeelake), so those platforms should be supported. Then we have HDCP 2.2 support, PSR2 enabling by default and VBT data parsing fixes on display side. On GT side there is an option to allow Mesa to better recover from GPU hangs and fixes to the mmap behaviour. Then the usual assortment of fixes and some prep code for Virtual Engine work, parts of which will follow in next PR. Best Regards, Joonas PS. This contains a backmerge and Maarten's topic/hdr-format topic branch merged twice + MEI topic branch merged from Daniel. *** drm-intel-next-2019-03-20: UAPI Changes: - Report an error early instead of SIGBUS later when mmap beyond BO size Core Changes: - This includes backmerge of drm-next and two merges of Maarten's topic/hdr-formats Driver Changes: - Add Comet Lake (Gen9) PCI IDs to Coffee Lake ID list (Anusha) - Add missing ICL PCI ID (Jose) - Fix legacy gamma mode for ICL (Ville) - Assume eDP is present on port A when there is no VBT (Thomas) - Corrections to eDP training patterns (Jose) - Fix PSR2 selective update corruption after PSR1 setup (Jose) - Fix CRC mismatch error for DP link layer compliance (Aditya) - Fix CNL DPLL readout and clean up code (Ville) - Turn off the CUS when turning off a HDR plane (Ville) - Avoid a race with execlist tasklet during race (Chris) - Add missing CSC readout and clean up code (Ville) - Avoid unnecessary wakeref during debugfs/drop_caches/set (Chris, Caz) - Hold references to ring/HW context/context explicitly when used (Chris) - Assume next platforms inherit old platform (Rodrigo) - Use HWS indices rather than addresses for breadcrumbs (Chris) - Add REG_BIT/REG_GENMASK and REG_FIELD_PREP macros (Jani) - Convert crept in C99 types to kernel fixed size types (Jani) - Avoid passing full dev_priv in forcewake functions (Daniele) - Reset GuC on GPU reset (Sujaritha) - Rework MG and Combo PLLs to vfuncs (Lucas) - Explicitly track ppGTT size (Chris, Bob) - Coding style improvements and code modularization (Ville) - Selftest and debugging improvements (Chris) drm-intel-next-2019-03-11: UAPI Changes: - Disallow creating user context when GPU is wedged (Chris) Mesa: https://lists.freedesktop.org/archives/mesa-dev/2019-February/215469.html - Remove engine instance from GEM_BUSY extended info (Chris) Only user of extended info is ddx/sna and it doesn't use instance Driver Changes: - Remove alpha_support protection for ICL - HDCP 2.2 support (Ramalingam) - HDMI infoframe support (Ville) - Enable PSR2 by default (Jose) - Support CRC on more planes on SKL+ (Ville) - Read out memory type on Gen9+ (Ville) - Pretend to only have 1 DBuf slice on ICL for now (Imre) - Fix gamma mode state check on ICL (Uma) - Fix the state checker for ICL Y planes (Ville) - Force modeset when resetting HDMI link (Jose) - Remove broken DP CRC support on g4x (Ville) - Remove last global seqno and use random number in hangcheck to identify progress (Chris) - Suppress mere WAIT and redundant preemption (Chris) - Fix Bugzilla #109580: Limit deboosting and boosting for more GPU frequency hysteresis (Chris, Lyude) - Use HW semaphores for inter-engine synchronization on Gen8+ (Chris) - Avoid reporting GPU wedged while check is still in progress (Chris) - Always sample an active ringbuffer in PMU (Chris) - Report engines are idle if already parked (Chris) - Default to Thread Group preemption for compute workloads on ICL (Michal) - Fix a regression caused by the mmap VMA check (Tvrtko, Guenter) - Remove assumptions about request ordering (Chris) - Use single point of truth for PPS divisor register (Jani) - Selftest improvements and CI bug fixes (Chris) - Prepare codebase for Virtual Engine (Chris) - Populate pipe_offsets[] & co. accurately (Ville) - Make request/object/vma allocation caches global (Chris) - Remove redundant likely/unlikely annotations (Chengguang) - Reset locking fixes (Chris) - GuC code refactoring (Sujaritha) - Skip scanning signalers for inflight requests (Chris) - Remove second level open-coded rcu work (Chris) - Order if-ladders from newer to older platform (Rodrigo) - Move MG pll hw_state readout / AUX mask code to separate function (Lucas) - Track active contexts and pinning in context (Chris) drm-intel-next-2019-02-20: UAPI Changes: - Optionally disable automatic recovery after a GPU reset (Chris) Mesa changes at: https://lists.freedesktop.org/archives/mesa-dev/2019-February/215431.html - Added reminders about not leaving holes to uAPI number sequences Cross-subsystem Changes: - Includes the backmerge of drm-next and merge of Daniel's mei-hdcp/i915 component interface work Driver Changes: - Correctly interpret Raw VBT Data Address on OpRegion version 2.1 (ICL+) (Jani) - Fix to actually configure untiled fbdev displays (Maarten, Chris) - Avoid referencing stale pointer in priority scheduler (Chris) - Always restore interrupt enabling after a reset on older gens (Chris) - Use time based guilty context banning (Chris) - Implement new W/A for ICL pipe underruns with wm1+ disabled (Ville) - Fix GLK degamma programming and add ICL degamma/gamma/CSC support (Uma) - Apply RPS waitboosting to non-i915 fences (Chris) - Protect i915_active iterators from the shrinker (Chris) - Defer application of request banning to submission to avoid escapes (Chris) - Track the snd/hda display_power_status using a cookie (Chris) - Only try to park engines after a failed reset (Chris) - Don't claim an unstarted request was guilty of causing hang (Chris) - Revoke mmaps and prevent access to fence registers across reset (Chris) - Make driver reset and wedging more robust (Chris) - Avoid fence releasing race (Mika, Chris) - Fix HDCP state handling for DDI during fastset (Ram) - Register naming fixes (Aditya, Ville) - Fix OpRegion version check (Jani) - Gamma and CSC state tracking fixes (Ville) - Add driver debugging aids (Ville, Chris) - Fixes and improvements to CI issues and kernel selftests (Chris, Jose) The following changes since commit a94bed60cb73962f344ead14b2ee7613280432c6: drm/i915/icl: Implement half float formats (2019-03-13 11:23:12 +0100) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-03-20 for you to fetch changes up to 1284ec985572232ace4817476baeb2d82b60be7a: drm/i915: Update DRIVER_DATE to 20190320 (2019-03-20 10:03:48 +0200) ---------------------------------------------------------------- Abdiel Janulgue (1): drm/i915/query: Split out query item checks Aditya Swarup (3): drm/i915: Make combo PHY DDI macro definitions consistent for ICL and CNL drm/i915: Make MG PHY macros semantically consistent drm/i915/icl: Fix CRC mismatch error for DP link layer compliance Anusha Srivatsa (2): drm/i915/cml: Add CML PCI IDS drm/i915/cml: Introduce Comet Lake PCH Chengguang Xu (1): drm/i915: remove redundant likely/unlikely annotation Chris Wilson (106): drm/i915: Defer removing fence register tracking to rpm wakeup drm/i915: Revoke mmaps and prevent access to fence registers across reset drm/i915: Force the GPU reset upon wedging drm/i915: Uninterruptibly drain the timelines on unwedging drm/i915: Wait for old resets before applying debugfs/i915_wedged drm/i915: Serialise resets with wedging drm/i915: Don't claim an unstarted request was guilty drm/i915/execlists: Refactor out can_merge_rq() drm/i915: Protect i915_active iterators from the shrinker drm/i915: Pull sync_scru for device reset outside of wedge_mutex drm/i915: Use synchronize_srcu_expedited() for resets drm/i915: Include the current timeline seqno for debugging execlists drm/i915: Reacquire priolist cache after dropping the engine lock drm/i915: Recursive i915_reset_trylock() verboten drm/i915: Detect potential i915_reset_trylock() lockups drm/i915: Apply rps waitboosting for dma_fence_wait_timeout() snd/hda, drm/i915: Track the display_power_status using a cookie drm/i915: Only try to park engines after a failed reset drm/i915/selftests: Always use an active engine while resetting drm/i915: Defer application of request banning to submission drm/i915/selftests: Drop unnecessary struct_mutex around i915_reset() drm/i915/fbdev: Actually configure untiled displays drm/i915/selftests: Always free spinner on __sseu_prepare error drm/i915/selftests: Move local mock_ggtt allocations to the heap drm/i915: Optionally disable automatic recovery after a GPU reset drm/i915/selftests: Make unbannable contexts for reset handling drm/i915: Restore interrupt enabling after a reset drm/i915: Include reminders about leaving no holes in uAPI enums drm/i915: Move verify_wm_state() to heap drm/i915: Trim delays for wedging drm/i915: Use time based guilty context banning drm/i915: Beware temporary wedging when determining -EIO drm/i915: Avoid reset lock in writing fence registers drm/i915: Reduce the RPS shock drm/i915: Prevent user context creation while wedged drm/i915/hdcp: Silence compiler critics drm/i915: Reorder struct_mutex-vs-reset_lock in i915_gem_fault() drm/i915/guc: Flush the residual log capture irq on disabling drm/i915/pmu: Always sample an active ringbuffer drm/i915: Replace global_seqno with a hangcheck heartbeat seqno drm/i915: Remove access to global seqno in the HWSP drm/i915: Remove i915_request.global_seqno drm/i915/selftests: Exercise resetting during non-user payloads drm/i915: Skip scanning for signalers if we are already inflight drm/i915: Avoid waking the engines just to check if they are idle drm/i915: Compute the global scheduler caps Revert "drm/i915: Avoid waking the engines just to check if they are idle" drm/i915: Report engines are idle if already parked drm/i915: Make request allocation caches global drm/i915: Make object/vma allocation caches global drm/i915: Remove second level open-coded rcu work drm/i915: Use __ffs() in for_each_priolist for more compact code drm/i915/execlists: Suppress mere WAIT preemption drm/i915: Introduce i915_timeline.mutex drm/i915/selftests: Check that whitelisted registers are accessible drm/i915/execlists: Suppress redundant preemption drm/i915: Keep timeline HWSP allocated until idle across the system drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+ drm/i915: Prioritise non-busywait semaphore workloads drm/i915: Fix I915_EXEC_RING_MASK drm/i915: Acquire breadcrumb ref before cancelling drm/i915/gtt: Use optimised memset32/64 for clearing PTE drm/i915/gtt: Store scratch page size alongside not in the common struct drm/i915: Just check the vebox IIR regardless drm/i915: Stop capturing semaphore registers for gen6/7 GPU hangs drm/i915: Remove last traces of exec-id (GEM_BUSY) drm/i915: Store the BIT(engine->id) as the engine's mask drm/i915/gtt: Mark ALL_ENGINES as dirty on ppGTT modification drm/i915: Move find_active_request() to the engine drm/i915: Use i915_global_register() drm/i915: Pass around the intel_context drm/i915/selftests: Fix MI_STORE_DWORD_IMM alignment drm/i915: Make I915_GEM_IDLE_TIMEOUT into a macro drm/i915: Force GPU idle on suspend drm/i915/selftests: Improve switch-to-kernel-context checking drm/i915/selftests: Check preemption support on each engine drm/i915: Do a synchronous switch-to-kernel-context on idling drm/i915: Refactor common code to load initial power context drm/i915: Reduce presumption of request ordering for barriers drm/i915: Remove has-kernel-context drm/i915: Track active engines within a context drm/i915: Split struct intel_context definition to its own header drm/i915: Store the intel_context_ops in the intel_engine_cs drm/i915: Move over to intel_context_lookup() drm/i915: Make context pinning part of intel_context_ops drm/i915: Track the pinned kernel contexts on each engine drm/i915: Introduce intel_context.pin_mutex for pin management drm/i915: Suppress the "Failed to idle" warning for gem_eio drm/i915: Introduce a context barrier callback drm/i915: Consolidate reset-request debug message drm/i915/selftests: Improve error detection of reset failure drm/i915/selftests: Disable preemption while setting up fence-timers drm/i915: Refactor to common helpers for prepare/finish between reset & wedge drm/i915: Mark up vGPU support for full-ppgtt drm/i915: Record platform specific ppGTT size in intel_device_info drm/i915: Drop address size from ppgtt_type drm/i915/gtt: Rename i915_vm_is_48b to i915_vm_is_4lvl drm/i915/gtt: Refactor common ppgtt initialisation drm/i915: Always kick the execlists tasklet after reset drm/i915: Fix off-by-one in reporting hanging process drm/i915: Sanity check mmap length against object size drm/i915: Stop needlessly acquiring wakeref for debugfs/drop_caches_set drm/i915: Switch to use HWS indices rather than addresses drm/i915: Hold a ref to the ring while retiring drm/i915: Lock the gem_context->active_list while dropping the link drm/i915: Hold a reference to the active HW context Daniele Ceraolo Spurio (1): drm/i915: do not pass dev_priv to low-level forcewake functions Imre Deak (1): drm/i915/icl: Prevent incorrect DBuf enabling Jani Nikula (9): drm/i915/opregion: fix version check drm/i915/opregion: rvda is relative from opregion base in opregion 2.1+ drm/i915/dp: deconflate PPS unlock from divisor register drm/i915/dp: use single point of truth for PPS divisor register drm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents drm/i915: deprecate _SHIFT in favor of _MASK passed to accessors drm/i915: use REG_FIELD_PREP() to define register bitfield values drm/i915: stick to kernel fixed size types drm/i915/psr: remove drmP.h include that crept in Joonas Lahtinen (8): Merge drm/drm-next into drm-intel-next-queued Merge tag 'topic/mei-hdcp-2019-02-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next-queued drm/i915: Update DRIVER_DATE to 20190220 drm/i915: Update DRIVER_DATE to 20190311 Merge drm/drm-next into drm-intel-next-queued Merge tag 'topic/hdr-formats-2019-03-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-intel-next-queued Merge tag 'topic/hdr-formats-2019-03-13' of git://anongit.freedesktop.org/drm/drm-misc into drm-intel-next-queued drm/i915: Update DRIVER_DATE to 20190320 José Roberto de Souza (20): drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug drm/i915: Call MG_DP_MODE() macro with the right parameters order drm/i915: Fix atomic state leak when resetting HDMI link drm/i915: Don't manually add connectors and planes state drm/i915: Forcing a modeset when resetting HDMI link drm/i915/icl: Remove alpha support protection drm/i915/psr: Remove PSR2 FIXME drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset drm/i915: Compute and commit color features in fastsets drm/i915/psr: Drop test for EDP in CRTC when forcing commit drm/i915/crc: Make IPS workaround generic drm/i915: Disable PSR2 while getting pipe CRC drm/i915: Drop redundant checks to update PSR state drm/i915: Force PSR1 exit when getting pipe CRC drm/i915: Enable PSR2 by default drm/i915: Add new ICL PCI ID drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time drm/i915/psr: Move logic to get TPS registers values to another function drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR1 drm/i915: Fix PSR2 selective update corruption after PSR1 setup Lucas De Marchi (10): drm/i915/icl: move MG pll hw_state readout drm/i915: extract AUX mask assignment to separate function drm/i915: refactor transcoders reporting on error state drm/i915: allow platforms without eDP transcoder drm/i915: Fix bit name in PP_STATUS register drm/i915/icl: split combo and mg pll enable drm/i915/icl: split pll enable in three steps drm/i915/icl: split combo and mg pll disable drm/i915/icl: split combo and tbt pll funcs drm/i915/icl: remove intel_dpll_is_combophy() Michał Winiarski (2): drm/i915/icl: Default to Thread Group preemption for compute workloads drm/i915/selftests: Upgrade printing test/subtest name to pr_info Ramalingam C (16): drm/i915: HDCP state handling in ddi_update_pipe drm/i915: Gathering the HDCP1.4 routines together drm/i915: Initialize HDCP2.2 drm/i915: MEI interface implementation drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking drm/i915: Enable and Disable of HDCP2.2 drm/i915: Implement HDCP2.2 receiver authentication drm/i915: Implement HDCP2.2 repeater authentication drm: HDCP2.2 link check period drm/i915: Implement HDCP2.2 link integrity check drm/i915: Handle HDCP2.2 downstream topology change drm: removing the DP Errata msg and its msg id drm/i915: Implement the HDCP2.2 support for DP drm/i915: Implement the HDCP2.2 support for HDMI drm/i915: CP_IRQ handling for DP HDCP2.2 msgs drm/i915: Fix KBL HDCP2.2 encrypt status signalling Rodrigo Vivi (8): drm/i915: Sort ctx workarounds init from newer to older platforms. drm/i915: Sort newer to older platforms. drm/i915: Remove unused HAS_PCH_CNP_LP drm/i915: Yet another if/else sort of newer to older platforms. drm/i915/gen11+: First assume next platforms will inherit stuff drm/i915: Move PCH_NOP to -1 drm/i915: Start using comparative INTEL_PCH_TYPE drm/i915: Also use new comparative stuff for more ICP+ stuff Sujaritha Sundaresan (3): drm/i915/guc: Splitting CT channel open/close functions drm/i915/guc: Calling guc_disable_communication in all suspend paths drm/i915/guc: Preparing for GuC reset along with engine reset Thomas Preston (1): drm/i915/bios: assume eDP is present on port A when there is no VBT Tvrtko Ursulin (2): drm/i915: Re-arrange execbuf so context is known before engine drm/i915: Relax mmap VMA check Uma Shankar (6): drm/i915/glk: Fix degamma lut programming drm/i915/icl: Add icl pipe degamma and gamma support drm/i915/icl: Enable ICL Pipe CSC block drm/i915/icl: Enable pipe output csc drm/i915/icl: Add degamma and gamma lut size to gen11 caps drm/i915/icl: Drop redundant gamma mode mask Ville Syrjälä (72): drm/i915: Populate gamma_mode for all platforms drm/i915: Track pipe gamma enable/disable in crtc state drm/i915: Track pipe csc enable in crtc state drm/i915: Turn off pipe gamma when it's not needed drm/i915: Turn off pipe CSC when it's not needed drm/i915: Disable pipe gamma when C8 pixel format is used drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable() drm/i915: Dump skl+ watermark changes drm/i915: s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/ drm/i915: Assert that VED and ISP are power gated Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" drm/i915: Include "ignore lines" in skl+ wm state drm/i915: Implement new w/a for underruns with wm1+ disabled drm/i915: Add pipe crc tracepoint drm/i915: Add pipe enable/disable tracepoints drm/i915: Add overlooked plane disable tracepoint into intel_crtc_disable_planes() drm/i915: Wrap plane update/disable hook calls drm/i915: Remove the "pf" crc source drm/i915: Use named initializers for the crc source name array drm/i915: Remove the broken DP CRC support for g4x drm/i915: Extend skl+ crc sources with more planes drm/i915: Add the missing HDMI gamut metadata packet stuff drm/i915: Return the mask of enabled infoframes from ->inforame_enabled() drm/i915: Store mask of enabled infoframes in the crtc state drm/i915: Precompute HDMI infoframes drm/i915: Read out HDMI infoframes drm/i915/sdvo: Precompute HDMI infoframes drm/i915/sdvo: Read out HDMI infoframes drm/i915: Check infoframe state in intel_pipe_config_compare() drm/i915: Include infoframes in the crtc state dump drm/i915: Finalize Wa_1408961008:icl drm/i915: Fix the state checker for ICL Y planes drm/i915: Do not temporarily disable the DPLL on i830 drm/i915: Simplify i830 DVO 2x clock handling drm/i915: Populate pipe_offsets[] & co. accurately drm/i915: Store DIMM rank information as a number drm/i915: Extract functions to derive SKL+ DIMM info drm/i915: Polish skl_is_16gb_dimm() drm/i915: Extract BXT DIMM helpers drm/i915: Fix DRAM size reporting for BXT drm/i915: Extract DIMM info on GLK too drm/i915: Use dram_dimm_info more drm/i915: Generalize intel_is_dram_symmetric() drm/i914: s/l_info/dimm_l/ etc. drm/i915: Clean up intel_get_dram_info() a bit drm/i915: Extract DIMM info on cnl+ drm/i915: Read out memory type drm/i915: Readout and check csc_mode drm/i915: Precompute/readout/check CHV CGM mode drm/i915: Extract ilk_csc_limited_range() drm/i915: Clean up ilk/icl pipe/output CSC programming drm/i915: Extract ilk_csc_convert_ctm() drm/i915: Clean the csc limited range/identity programming drm/i915: Split ilk vs. icl csc matrix handling drm/i915: Fix legacy gamma mode for ICL drm/i915: Turn off the CUS when turning off a HDR plane drm/i915: Don't pass crtc to intel_find_shared_dpll() drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll() drm/i915: Pass crtc_state down to skl dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll() drm/i915: Pass crtc_state down to bxt dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll() drm/i915: Pass crtc_state down to cnl dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll() drm/i915: Pass crtc_state down to icl dpll funcs drm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll() drm/i915: Fix readout for cnl DPLL kdiv==3 drm/i915: Nuke icl_calc_dp_combo_pll_link() drm/i915: Remove the fragile array index -> link rate mapping drm/i915: Add some missing curly braces drm/i915: Polish intel_get_lvds_encoder() drm/i915: Pass dev_priv to intel_is_dual_link_lvds() Documentation/driver-api/component.rst | 17 + Documentation/driver-api/device_link.rst | 3 + Documentation/driver-api/index.rst | 1 + drivers/base/component.c | 206 +++- drivers/gpu/drm/i915/Makefile | 11 + drivers/gpu/drm/i915/gvt/cmd_parser.c | 44 +- drivers/gpu/drm/i915/gvt/dmabuf.c | 2 +- drivers/gpu/drm/i915/gvt/execlist.c | 17 +- drivers/gpu/drm/i915/gvt/handlers.c | 26 +- drivers/gpu/drm/i915/gvt/interrupt.c | 2 +- drivers/gpu/drm/i915/gvt/mmio_context.c | 231 ++-- drivers/gpu/drm/i915/gvt/scheduler.c | 27 +- drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- drivers/gpu/drm/i915/i915_active.c | 59 +- drivers/gpu/drm/i915/i915_active.h | 16 - drivers/gpu/drm/i915/i915_cmd_parser.c | 12 +- drivers/gpu/drm/i915/i915_debugfs.c | 121 +- drivers/gpu/drm/i915/i915_drv.c | 476 +++++--- drivers/gpu/drm/i915/i915_drv.h | 134 +-- drivers/gpu/drm/i915/i915_gem.c | 628 +++------- drivers/gpu/drm/i915/i915_gem.h | 9 +- drivers/gpu/drm/i915/i915_gem_context.c | 287 +++-- drivers/gpu/drm/i915/i915_gem_context.h | 250 +--- drivers/gpu/drm/i915/i915_gem_context_types.h | 182 +++ drivers/gpu/drm/i915/i915_gem_dmabuf.c | 2 +- drivers/gpu/drm/i915/i915_gem_evict.c | 18 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 35 +- drivers/gpu/drm/i915/i915_gem_fence_reg.c | 88 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 104 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 10 +- drivers/gpu/drm/i915/i915_gem_internal.c | 2 +- drivers/gpu/drm/i915/i915_gem_object.c | 42 + drivers/gpu/drm/i915/i915_gem_object.h | 4 +- drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +- drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +- drivers/gpu/drm/i915/i915_gem_userptr.c | 2 +- drivers/gpu/drm/i915/i915_globals.c | 135 +++ drivers/gpu/drm/i915/i915_globals.h | 35 + drivers/gpu/drm/i915/i915_gpu_error.c | 109 +- drivers/gpu/drm/i915/i915_gpu_error.h | 48 +- drivers/gpu/drm/i915/i915_irq.c | 143 ++- drivers/gpu/drm/i915/i915_pci.c | 219 ++-- drivers/gpu/drm/i915/i915_perf.c | 92 +- drivers/gpu/drm/i915/i915_pmu.c | 67 +- drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- drivers/gpu/drm/i915/i915_query.c | 39 +- drivers/gpu/drm/i915/i915_reg.h | 466 +++++--- drivers/gpu/drm/i915/i915_request.c | 346 ++++-- drivers/gpu/drm/i915/i915_request.h | 71 +- drivers/gpu/drm/i915/i915_reset.c | 376 +++--- drivers/gpu/drm/i915/i915_reset.h | 6 + drivers/gpu/drm/i915/i915_scheduler.c | 117 +- drivers/gpu/drm/i915/i915_scheduler.h | 43 +- drivers/gpu/drm/i915/i915_sw_fence.c | 4 +- drivers/gpu/drm/i915/i915_sw_fence.h | 3 + drivers/gpu/drm/i915/i915_timeline.c | 294 ++++- drivers/gpu/drm/i915/i915_timeline.h | 73 +- drivers/gpu/drm/i915/i915_timeline_types.h | 80 ++ drivers/gpu/drm/i915/i915_trace.h | 106 +- drivers/gpu/drm/i915/i915_vgpu.c | 4 +- drivers/gpu/drm/i915/i915_vgpu.h | 2 +- drivers/gpu/drm/i915/i915_vma.c | 51 +- drivers/gpu/drm/i915/i915_vma.h | 3 + drivers/gpu/drm/i915/icl_dsi.c | 8 +- drivers/gpu/drm/i915/intel_atomic_plane.c | 54 +- drivers/gpu/drm/i915/intel_audio.c | 27 +- drivers/gpu/drm/i915/intel_bios.c | 30 +- drivers/gpu/drm/i915/intel_breadcrumbs.c | 18 +- drivers/gpu/drm/i915/intel_cdclk.c | 60 +- drivers/gpu/drm/i915/intel_color.c | 591 +++++++--- drivers/gpu/drm/i915/intel_connector.c | 2 + drivers/gpu/drm/i915/intel_context.c | 269 +++++ drivers/gpu/drm/i915/intel_context.h | 87 ++ drivers/gpu/drm/i915/intel_context_types.h | 73 ++ drivers/gpu/drm/i915/intel_ddi.c | 147 +-- drivers/gpu/drm/i915/intel_device_info.c | 10 +- drivers/gpu/drm/i915/intel_device_info.h | 13 +- drivers/gpu/drm/i915/intel_display.c | 466 +++++--- drivers/gpu/drm/i915/intel_display.h | 16 +- drivers/gpu/drm/i915/intel_dp.c | 447 ++++++- drivers/gpu/drm/i915/intel_dpll_mgr.c | 735 ++++++------ drivers/gpu/drm/i915/intel_dpll_mgr.h | 5 +- drivers/gpu/drm/i915/intel_drv.h | 155 ++- drivers/gpu/drm/i915/intel_dsi_vbt.c | 6 +- drivers/gpu/drm/i915/intel_engine_cs.c | 288 +++-- drivers/gpu/drm/i915/intel_engine_types.h | 525 +++++++++ drivers/gpu/drm/i915/intel_gpu_commands.h | 9 +- drivers/gpu/drm/i915/intel_guc.c | 12 + drivers/gpu/drm/i915/intel_guc.h | 1 + drivers/gpu/drm/i915/intel_guc_ads.c | 3 +- drivers/gpu/drm/i915/intel_guc_ct.c | 94 +- drivers/gpu/drm/i915/intel_guc_ct.h | 3 + drivers/gpu/drm/i915/intel_guc_log.c | 5 + drivers/gpu/drm/i915/intel_guc_submission.c | 22 +- drivers/gpu/drm/i915/intel_hangcheck.c | 18 +- drivers/gpu/drm/i915/intel_hdcp.c | 1242 ++++++++++++++++++-- drivers/gpu/drm/i915/intel_hdmi.c | 770 ++++++++++-- drivers/gpu/drm/i915/intel_lrc.c | 417 ++++--- drivers/gpu/drm/i915/intel_lspcon.c | 13 +- drivers/gpu/drm/i915/intel_lvds.c | 57 +- drivers/gpu/drm/i915/intel_mocs.c | 14 +- drivers/gpu/drm/i915/intel_overlay.c | 2 +- drivers/gpu/drm/i915/intel_panel.c | 5 +- drivers/gpu/drm/i915/intel_pipe_crc.c | 228 ++-- drivers/gpu/drm/i915/intel_pm.c | 135 ++- drivers/gpu/drm/i915/intel_psr.c | 295 +++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 177 ++- drivers/gpu/drm/i915/intel_ringbuffer.h | 598 +--------- drivers/gpu/drm/i915/intel_runtime_pm.c | 57 +- drivers/gpu/drm/i915/intel_sdvo.c | 156 ++- drivers/gpu/drm/i915/intel_sprite.c | 36 +- drivers/gpu/drm/i915/intel_uc.c | 23 +- drivers/gpu/drm/i915/intel_uc.h | 1 + drivers/gpu/drm/i915/intel_uncore.c | 120 +- drivers/gpu/drm/i915/intel_uncore.h | 9 +- drivers/gpu/drm/i915/intel_vbt_defs.h | 3 + drivers/gpu/drm/i915/intel_workarounds.c | 113 +- drivers/gpu/drm/i915/intel_workarounds.h | 13 +- drivers/gpu/drm/i915/intel_workarounds_types.h | 27 + drivers/gpu/drm/i915/selftests/huge_gem_object.c | 2 +- drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +- drivers/gpu/drm/i915/selftests/i915_active.c | 2 +- drivers/gpu/drm/i915/selftests/i915_gem.c | 9 +- .../gpu/drm/i915/selftests/i915_gem_coherency.c | 8 +- drivers/gpu/drm/i915/selftests/i915_gem_context.c | 269 +++-- drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 2 +- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 18 +- drivers/gpu/drm/i915/selftests/i915_gem_object.c | 4 +- drivers/gpu/drm/i915/selftests/i915_request.c | 23 +- drivers/gpu/drm/i915/selftests/i915_selftest.c | 4 +- drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 9 +- drivers/gpu/drm/i915/selftests/i915_timeline.c | 113 ++ drivers/gpu/drm/i915/selftests/i915_vma.c | 16 +- drivers/gpu/drm/i915/selftests/igt_flush_test.c | 4 +- drivers/gpu/drm/i915/selftests/igt_spinner.c | 7 + drivers/gpu/drm/i915/selftests/intel_guc.c | 4 +- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 296 ++++- drivers/gpu/drm/i915/selftests/intel_lrc.c | 187 ++- drivers/gpu/drm/i915/selftests/intel_workarounds.c | 415 ++++++- drivers/gpu/drm/i915/selftests/mock_context.c | 9 +- drivers/gpu/drm/i915/selftests/mock_engine.c | 100 +- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 52 +- drivers/gpu/drm/i915/selftests/mock_request.c | 12 +- drivers/gpu/drm/i915/selftests/mock_request.h | 7 - drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 + .../drm/i915/test_i915_active_types_standalone.c | 7 + .../i915/test_i915_gem_context_types_standalone.c | 7 + .../drm/i915/test_i915_timeline_types_standalone.c | 7 + .../drm/i915/test_intel_context_types_standalone.c | 7 + .../drm/i915/test_intel_engine_types_standalone.c | 7 + .../i915/test_intel_workarounds_types_standalone.c | 7 + include/drm/drm_audio_component.h | 8 +- include/drm/drm_hdcp.h | 25 +- include/drm/i915_component.h | 5 + include/drm/i915_drm.h | 15 + include/drm/i915_mei_hdcp_interface.h | 149 +++ include/drm/i915_pciids.h | 31 +- include/linux/component.h | 76 ++ include/sound/hda_component.h | 5 +- include/sound/hdaudio.h | 2 +- include/uapi/drm/i915_drm.h | 63 +- sound/hda/hdac_component.c | 22 +- sound/hda/hdac_i915.c | 6 +- 163 files changed, 11337 insertions(+), 5420 deletions(-) create mode 100644 Documentation/driver-api/component.rst create mode 100644 drivers/gpu/drm/i915/i915_gem_context_types.h create mode 100644 drivers/gpu/drm/i915/i915_globals.c create mode 100644 drivers/gpu/drm/i915/i915_globals.h create mode 100644 drivers/gpu/drm/i915/i915_timeline_types.h create mode 100644 drivers/gpu/drm/i915/intel_context.c create mode 100644 drivers/gpu/drm/i915/intel_context.h create mode 100644 drivers/gpu/drm/i915/intel_context_types.h create mode 100644 drivers/gpu/drm/i915/intel_engine_types.h create mode 100644 drivers/gpu/drm/i915/intel_workarounds_types.h create mode 100644 drivers/gpu/drm/i915/test_i915_active_types_standalone.c create mode 100644 drivers/gpu/drm/i915/test_i915_gem_context_types_standalone.c create mode 100644 drivers/gpu/drm/i915/test_i915_timeline_types_standalone.c create mode 100644 drivers/gpu/drm/i915/test_intel_context_types_standalone.c create mode 100644 drivers/gpu/drm/i915/test_intel_engine_types_standalone.c create mode 100644 drivers/gpu/drm/i915/test_intel_workarounds_types_standalone.c create mode 100644 include/drm/i915_mei_hdcp_interface.h _______________________________________________ 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