On Fri, Mar 22, 2019 at 05:43:52PM +0530, Vandita Kulkarni wrote:
> Re-enable clock gating of DDI clocks.
>
> v2: Fix the default ddi clk state for mipi-dsi (Imre)
>
> Fixes: 1026bea00381 (drm/i915/icl: Ungate DSI clocks)
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
> index 6a5b9fa..5caf41f 100644
> --- a/drivers/gpu/drm/i915/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/icl_dsi.c
> @@ -1124,7 +1124,7 @@ static void gen11_dsi_disable_port(struct intel_encoder *encoder)
> DRM_ERROR("DDI port:%c buffer not idle\n",
> port_name(port));
> }
> - gen11_dsi_ungate_clocks(encoder);
> + gen11_dsi_gate_clocks(encoder);
> }
>
> static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 933df3a..17a03fa 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2821,10 +2821,10 @@ void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
> return;
> }
> /*
> - * DSI ports should have their DDI clock ungated when disabled
> - * and gated when enabled.
> + * For MIPI DSI we unagate the clocks later as part of
> + * enable sequence. Keep them gated by default.
> */
> - ddi_clk_needed = !encoder->base.crtc;
> + ddi_clk_needed = false;
Should that be true?
> }
>
> val = I915_READ(DPCLKA_CFGCR0_ICL);
> --
> 1.9.1
>
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--
Ville Syrjälä
Intel
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