Add Plane Gamma Register definitions for ICL+ Signed-off-by: Uma Shankar <uma.shankar@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_reg.h | 42 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b9a2084..019227b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10222,7 +10222,47 @@ enum skl_power_gate { #define PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_4(pipe),\ _PLANE_PRE_CSC_GAMC_DATA_5(pipe)) - +/* Plane Gamma Registers */ +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A 0x701D8 +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B 0x711D8 +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A 0x702D8 +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B 0x712D8 +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B) +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B) + +#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe),\ + _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe)) + +#define _PLANE_POST_CSC_GAMC_INDEX_4_A 0x704D8 +#define _PLANE_POST_CSC_GAMC_INDEX_4_B 0x714D8 +#define _PLANE_POST_CSC_GAMC_INDEX_5_A 0x705D8 +#define _PLANE_POST_CSC_GAMC_INDEX_5_B 0x715D8 +#define _PLANE_POST_CSC_GAMC_INDEX_4(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_4_A, _PLANE_POST_CSC_GAMC_INDEX_4_B) +#define _PLANE_POST_CSC_GAMC_INDEX_5(pipe) _PIPE(pipe, _PLANE_POSt_CSC_GAMC_INDEX_5_A, _PLANE_POST_CSC_GAMC_INDEX_5_B) + +#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_4(pipe),\ + _PLANE_POSt_CSC_GAMC_INDEX_5(pipe)) + +#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_A 0x701DC +#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_B 0x711DC +#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_A 0x702DC +#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_B 0x712DC +#define _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_1_A, _PLANE_POST_CSC_GAMC_DATA_ENH_1_B) +#define _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_2_A, _PLANE_POST_CSC_GAMC_DATA_ENH_2_B) + +#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe),\ + _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe)) + +#define _PLANE_POST_CSC_GAMC_DATA_4_A 0x704DC +#define _PLANE_POST_CSC_GAMC_DATA_4_B 0x714DC +#define _PLANE_POST_CSC_GAMC_DATA_5_A 0x705DC +#define _PLANE_POST_CSC_GAMC_DATA_5_B 0x715DC +#define _PLANE_POST_CSC_GAMC_DATA_4(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_4_A, _PLANE_POST_CSC_GAMC_DATA_4_B) +#define _PLANE_POST_CSC_GAMC_DATA_5(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_5_A, _PLANE_POST_CSC_GAMC_DATA_5_B) + +#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_4(pipe),\ + _PLANE_POST_CSC_GAMC_DATA_5(pipe)) +/* Plane Gamma Registers */ /* pipe CSC & degamma/gamma LUTs on CHV */ #define _CGM_PIPE_A_CSC_COEFF01 (VLV_DISPLAY_BASE + 0x67900) #define _CGM_PIPE_A_CSC_COEFF23 (VLV_DISPLAY_BASE + 0x67904) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx