Quoting Tvrtko Ursulin (2019-03-11 07:16:48) > > On 08/03/2019 17:11, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-03-08 16:31:51) > >> Looks okay. But one more thing is needed: > >> > >> https://cgit.freedesktop.org/~tursulin/drm-intel/commit/?h=media&id=38266bfe99469de9e13774a13fa641c377988c67 > > > > drm/i915: Allow SSEU configuration to be set on virtual engine > > > > /* Only render engine supports RPCS configuration. */ > > - if (engine->class != RENDER_CLASS) > > + if (engine->class != RENDER_CLASS && > > + !(engine->flags & I915_ENGINE_IS_VIRTUAL && > > + ctx->engines[1]->class == RENDER_CLASS)) > > return -ENODEV; > > > > A virtual engine composed of RCS engines would have > > engine->class == RENDER_CLASS. > > > > So it's just the engine->id BUG_ON that needs lifting? > > If so then yes. Must be a recent change since I was sure the class was > set to other before. uabi_class = OTHER internal_class = ACTUAL and used to restrict physical engines to only belong to the same class (no load balancing across classes today). I _think_ we had that from the start, at least I remember wanting to do mixed class load-balancing but realising that I had to filter on class to avoid engine->emit_* mixups. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
