On some Cherry Trail devices, DisplayPort over Type-C is supported through a USB-PD microcontroller (e.g. a fusb302) + a mux to switch the superspeed datalines between USB-3 and DP (e.g. a pi3usb30532). The kernel in this case does the PD/alt-mode negotiation itself, rather then everything being handled in firmware. So the kernel itself picks an alt-mode, tells the Type-C "dongle" to switch to DP mode and sets the mux accordingly. In this setup the HPD pin is not connected, so the i915 driver needs to respond to a software event and scan the DP port for changes manually. This commit adds support for this. Together with the recent addition of DP alt-mode support to the Type-C subsystem this makes DP over Type-C work on these devices. Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_irq.c | 2 ++ drivers/gpu/drm/i915/intel_hotplug.c | 38 ++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b1c31967194b..5d8c585ddbf7 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -153,6 +153,7 @@ enum hpd_pin { struct i915_hotplug { struct work_struct hotplug_work; + struct notifier_block oob_notifier; struct { unsigned long last_jiffies; @@ -2632,6 +2633,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 pin_mask, u32 long_mask); void intel_hpd_init(struct drm_i915_private *dev_priv); void intel_hpd_init_work(struct drm_i915_private *dev_priv); +void intel_hpd_fini_work(struct drm_i915_private *dev_priv); void intel_hpd_cancel_work(struct drm_i915_private *dev_priv); enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv, enum port port); diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 8211045a981b..14f3323b721b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -4965,6 +4965,8 @@ void intel_irq_fini(struct drm_i915_private *i915) for (i = 0; i < MAX_L3_SLICES; ++i) kfree(i915->l3_parity.remap_info[i]); + + intel_hpd_fini_work(i915); } /** diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index e24174d08fed..221878fa26af 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c @@ -518,6 +518,36 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv, schedule_work(&dev_priv->hotplug.hotplug_work); } +static int intel_hpd_oob_notifier(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct drm_i915_private *dev_priv = + container_of(nb, struct drm_i915_private, hotplug.oob_notifier); + struct intel_encoder *encoder; + u32 bits = 0; + + /* We only support DP over Type-C notifications */ + if (event != DRM_OOB_HOTPLUG_TYPE_C_DP) + return NOTIFY_DONE; + + /* Schedule a hotplug check for each DP encoder, except for EDP ones */ + for_each_intel_dp(&dev_priv->drm, encoder) { + if (encoder->type == INTEL_OUTPUT_EDP) + continue; + + bits |= BIT(encoder->hpd_pin); + } + + if (bits) { + spin_lock_irq(&dev_priv->irq_lock); + dev_priv->hotplug.event_bits |= bits; + spin_unlock_irq(&dev_priv->irq_lock); + schedule_work(&dev_priv->hotplug.hotplug_work); + } + + return NOTIFY_DONE; +} + /** * intel_hpd_init - initializes and enables hpd support * @dev_priv: i915 device instance @@ -640,6 +670,14 @@ void intel_hpd_init_work(struct drm_i915_private *dev_priv) INIT_WORK(&dev_priv->hotplug.poll_init_work, i915_hpd_poll_init_work); INIT_DELAYED_WORK(&dev_priv->hotplug.reenable_work, intel_hpd_irq_storm_reenable_work); + dev_priv->hotplug.oob_notifier.notifier_call = intel_hpd_oob_notifier; + drm_kms_register_oob_hotplug_notifier(&dev_priv->hotplug.oob_notifier); +} + +void intel_hpd_fini_work(struct drm_i915_private *dev_priv) +{ + drm_kms_unregister_oob_hotplug_notifier( + &dev_priv->hotplug.oob_notifier); } void intel_hpd_cancel_work(struct drm_i915_private *dev_priv) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx