On Fri, 22 Feb 2019, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Use the newly introduced intel_apply_pci_quirks() to clean up
> the way we apply the ilk+ watermark quirks.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 75dceac19950..2a4b5014f56e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3059,10 +3059,17 @@ static void ilk_wm_disable_lp1_quirk(struct drm_i915_private *dev_priv)
> ilk_wm_disable_quirk(dev_priv, 1);
> }
>
> +static const struct intel_pci_quirk ilk_wm_quirks[] = {
Mmmh, ilk prefix, do you propose to add separate quirk arrays for
different platforms...? *shrug*
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> + /*
> + * Lenovo Thinkpad T431s (ivb)
> + * Massive underruns with LP1+.
> + */
> + { 0x0166, 0x17aa, 0x2208, ilk_wm_disable_lp1_quirk },
> + {}
> +};
> +
> static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
> {
> - struct pci_dev *pdev = dev_priv->drm.pdev;
> -
> intel_read_wm_latency(dev_priv, dev_priv->wm.pri_latency);
>
> memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency,
> @@ -3082,14 +3089,7 @@ static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
> snb_wm_lp3_irq_quirk(dev_priv);
> }
>
> - /*
> - * Lenovo Thinkpad T431s (ivb)
> - * Massive underruns.
> - */
> - if (pdev->device == 0x0166 &&
> - pdev->subsystem_vendor == 0x17aa &&
> - pdev->subsystem_device == 0x2208)
> - ilk_wm_disable_lp1_quirk(dev_priv);
> + intel_apply_pci_quirks(dev_priv, ilk_wm_quirks);
> }
>
> static void skl_setup_wm_latency(struct drm_i915_private *dev_priv)
--
Jani Nikula, Intel Open Source Graphics Center
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