On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> Forcing a specific CRTC to the eDP connector was causing the
> intel_psr_fastset_force() to mark mode_chaged in the wrong and
> disabled CRTC causing no update in the PSR state.
>
> Looks like our internal state track do not clear output_types and
> has_psr in the disabled CRTCs, not sure if this is the expected
> behavior or not but in the mean time this fix the issue.
Is there an IGT that's failing because of this? Looks like the state
would have got cleared only if the crtc was enabled to drive another
encoder.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 75c1a5deebf5..08967836b48e 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -986,7 +986,8 @@ static int intel_psr_fastset_force(struct
> drm_i915_private *dev_priv)
>
> intel_crtc_state = to_intel_crtc_state(crtc_state);
>
> - if (intel_crtc_has_type(intel_crtc_state,
> INTEL_OUTPUT_EDP) &&
> + if (crtc_state->enable &&
> + intel_crtc_has_type(intel_crtc_state,
> INTEL_OUTPUT_EDP) &&
> intel_crtc_state->has_psr) {
> /* Mark mode as changed to trigger a pipe-
> >update() */
> crtc_state->mode_changed = true;
I was wondering if we should remove the 'break;' that follows instead
and let ->update_pipe take care of the rest. However, checking
crtc_state->enable makes sense as there is not much point in triggering
a fastset on a disabled crtc.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
There might be a better way to do this, so please double check with
someone :)
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