On Fri, Feb 22, 2019 at 12:24 PM José Roberto de Souza
<jose.souza@xxxxxxxxx> wrote:
>
> The commit that this patch fixes changed the order of the parameters
> of MG_DP_MODE() but din't update the callers, breaking type-c on ICL.
ugh...
>
> Fixes: 58106b7d816e ("drm/i915: Make MG PHY macros semantically consistent")
>From a quick grep in the commit:
git show 58106b7d816e | grep "^+#define"
+#define MG_PHY_PORT_LN(ln, port, ln0p1, ln0p2, ln1p1) \
+#define MG_TX1_LINK_PARAMS(ln, port) \
+#define MG_TX2_LINK_PARAMS(ln, port) \
+#define MG_TX1_PISO_READLOAD(ln, port) \
+#define MG_TX2_PISO_READLOAD(ln, port) \
+#define MG_TX1_SWINGCTRL(ln, port) \
+#define MG_TX2_SWINGCTRL(ln, port) \
+#define MG_TX1_DRVCTRL(ln, port) \
+#define MG_TX2_DRVCTRL(ln, port) \
+#define MG_CLKHUB(ln, port) \
+#define MG_TX1_DCC(ln, port) \
+#define MG_TX2_DCC(ln, port) \
+#define MG_DP_MODE(ln, port) \
Going through each of those, it seems MG_DP_MODE() was indeed the only
one left behind. Could you double check?
Reviewed-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
thanks
Lucas De Marchi
> Cc: Clint Taylor <clinton.a.taylor@xxxxxxxxx>
> Cc: Imre Deak <imre.deak@xxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Cc: Aditya Swarup <aditya.swarup@xxxxxxxxx>
> Cc: Manasi navare <manasi.d.navare@xxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index ea83071a22c4..1355be8dec3b 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2928,7 +2928,7 @@ static void icl_enable_phy_clock_gating(struct intel_digital_port *dig_port)
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> enum port port = dig_port->base.port;
> enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
> - i915_reg_t mg_regs[2] = { MG_DP_MODE(port, 0), MG_DP_MODE(port, 1) };
> + i915_reg_t mg_regs[2] = { MG_DP_MODE(0, port), MG_DP_MODE(1, port) };
> u32 val;
> int i;
>
> @@ -2999,8 +2999,8 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
> if (tc_port == PORT_TC_NONE || intel_dig_port->tc_type == TC_PORT_TBT)
> return;
>
> - ln0 = I915_READ(MG_DP_MODE(port, 0));
> - ln1 = I915_READ(MG_DP_MODE(port, 1));
> + ln0 = I915_READ(MG_DP_MODE(0, port));
> + ln1 = I915_READ(MG_DP_MODE(1, port));
>
> switch (intel_dig_port->tc_type) {
> case TC_PORT_TYPEC:
> @@ -3050,8 +3050,8 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
> return;
> }
>
> - I915_WRITE(MG_DP_MODE(port, 0), ln0);
> - I915_WRITE(MG_DP_MODE(port, 1), ln1);
> + I915_WRITE(MG_DP_MODE(0, port), ln0);
> + I915_WRITE(MG_DP_MODE(1, port), ln1);
> }
>
> static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
> --
> 2.20.1
>
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--
Lucas De Marchi
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