On Gen 11 platform, to enable resolutions like 5K@120 (or higher) we need to use DSC (DP 1.4) or YCbCr4:2:0 (DP 1.3 or 1.4) on DP. In order to support YCbCr4:2:0 on DP we need to program YCBCR 4:2:0 to MSA and VSC SDP. This patches are RFC patches that add a VSC structure for handling Pixel Encoding/Colorimetry Formats and program YCBCR 4:2:0 to MSA and VSC SDP. This is currently not tested, but I wanted to get some inputs on this approach. The idea of a scaling (RGB -> YCbCr4:4:4 -> YCbCr 4:2:0) is to follow the same approach used in YCbCr 4:2:0 on HDMI. v2: Addressed Maarten's review comments, fixed minor coding and block comment style. And reordered a first patch ("drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11") as a last patch. Gwan-gyeong Mun (6): drm/i915/dp: Add a config function for YCBCR420 outputs drm: Add a VSC structure for handling Pixel Encoding/Colorimetry Formats drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSA drm/i915/dp: Update pipe_bpp for DP YCbCr4:2:0 outputs drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11 drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ddi.c | 16 +++- drivers/gpu/drm/i915/intel_dp.c | 148 +++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_drv.h | 2 + include/drm/drm_dp_helper.h | 17 ++++ 5 files changed, 177 insertions(+), 7 deletions(-) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx