On 19/02/2019 10:36, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-02-19 10:31:52)
On 19/02/2019 09:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-02-18 18:35:28)
We're about to introduce an options to open the perf stream, giving
the user ability to configure how often it wants the kernel to poll
the OA registers for available data.
Right now the workaround against the OA tail pointer race condition
requires at least twice the internal kernel polling timer to make any
data available.
I think this code is bogus. I do not think there is an aging problem on
hsw+, the only cause of zeroes being written that I've found is from
changing configs.
-Chris
Hmm... I'm pretty sure there is an issue and it's actually worse on the
HSW machine I have than on later machines.
The DRM_NOTE in that function is appearing a lot more on HSW.
But how much of that is due to not actually using the correct mb
ourselves, and how much of that is the OA actually writing zero?
-Chris
For the incorrect mb, I don't know. If I remember correctly, Rob used
i915_gem_object_pin_map(bo, I915_MAP_WB) on someone's recommendation.
So we assumed it would be alright.
On OA writing zero in the timestamp snapshot (with the rework I posted),
that is really unlikely.
-Lionel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
