At least on i965g and i965gm, performing a device reset clobbers the IER
resulting in loss of interrupts thereafter. So, run the irq_postinstall
hook to restore them.
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
Put it back to restoring the GMCH first. Hmm, maybe that's the key as to
which platforms require this?
---
drivers/gpu/drm/i915/i915_reset.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
index 5a067a4b3d5d..a1b74f605f2d 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -675,6 +675,7 @@ static int gt_reset(struct drm_i915_private *i915, unsigned int stalled_mask)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
+ unsigned long flags;
int err;
/*
@@ -685,12 +686,17 @@ static int gt_reset(struct drm_i915_private *i915, unsigned int stalled_mask)
if (err)
return err;
+ /* Restore IER as it may get clobbered on some platforms! (i965g[m]) */
+ spin_lock_irqsave(&i915->irq_lock, flags);
+ i915->drm.driver->irq_postinstall(&i915->drm);
+ spin_unlock_irqrestore(&i915->irq_lock, flags);
+
for_each_engine(engine, i915, id)
intel_engine_reset(engine, stalled_mask & ENGINE_MASK(id));
i915_gem_restore_fences(i915);
- return err;
+ return 0;
}
static void reset_finish_engine(struct intel_engine_cs *engine)
--
2.20.1
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