On Fri, Feb 8, 2019 at 2:51 PM <swati2.sharma@xxxxxxxxx> wrote: > > From: Juha-Pekka Heikkila <juhapekka.heikkila@xxxxxxxxx> > > Add P010 definition, semi-planar yuv format where each component > is 16 bits 10 msb containing color value. First come Y plane [10:6] > followed by 2x2 subsampled Cr:Cb plane [10:6:10:6] > > Add P012 definition, semi-planar yuv format where each component > is 16 bits 12 msb containing color value. First come Y plane [12:4] > followed by 2x2 subsampled Cr:Cb plane [12:4:12:4] > > Add P016 definition, semi-planar yuv format where each component > is 16 bits. First come Y plane followed by 2x2 subsampled Cr:Cb > plane [16:16] > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@xxxxxxxxx> If you send out someone else's patches, you need to add your own signed-off-by too. Also, I pointed out that other people are also working on P010 formats, but the coordination here didn't seem to have happened. Other patch will land in drm-misc rsn, so pls drop your patch here and for merging this means a backmerge. Thanks, Daniel > --- > drivers/gpu/drm/drm_fourcc.c | 3 +++ > include/uapi/drm/drm_fourcc.h | 10 ++++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > index d90ee03..d45a3a4 100644 > --- a/drivers/gpu/drm/drm_fourcc.c > +++ b/drivers/gpu/drm/drm_fourcc.c > @@ -226,6 +226,9 @@ const struct drm_format_info *__drm_format_info(u32 format) > { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, > { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, > { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true }, > + { .format = DRM_FORMAT_P010, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, > + { .format = DRM_FORMAT_P012, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, > + { .format = DRM_FORMAT_P016, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, > { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1, > .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 }, > .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true }, > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index 93a341d..073bbea 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -196,6 +196,16 @@ > #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ > > /* > + * 2 plane YCbCr > + * index 0 = Y plane, [15:0] Y little endian where Pxxx indicate > + * component xxx msb Y [xxx:16-xxx] > + * index 1 = Cr:Cb plane, [31:0] Cr:Cb little endian [xxx:16-xxx:xxx:16-xxx] > + */ > +#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane, 10 bit per channel */ > +#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled Cr:Cb plane, 12 bit per channel */ > +#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane, 16 bit per channel */ > + > +/* > * 3 plane YCbCr > * index 0: Y plane, [7:0] Y > * index 1: Cb plane, [7:0] Cb > -- > 1.9.1 > -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx