Quoting Mika Kuoppala (2019-02-08 09:31:48) > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > When declaring the GPU wedged, we do need to hit the GPU with the reset > > hammer so that its state matches our presumed state during cleanup. If > > the reset fails, it fails, and we may be unhappy but wedged. However, if > > we are testing our wedge/unwedged handling, the desync carries over into > > the next test and promptly explodes. > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=106702 > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reset.c | 8 ++++---- > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c > > index c67d6c2a09a2..64f26e17243a 100644 > > --- a/drivers/gpu/drm/i915/i915_reset.c > > +++ b/drivers/gpu/drm/i915/i915_reset.c > > @@ -532,9 +532,6 @@ typedef int (*reset_func)(struct drm_i915_private *, > > > > static reset_func intel_get_gpu_reset(struct drm_i915_private *i915) > > { > > - if (!i915_modparams.reset) > > - return NULL; > > - > > if (INTEL_GEN(i915) >= 8) > > return gen8_reset_engines; > > else if (INTEL_GEN(i915) >= 6) > > @@ -599,6 +596,9 @@ bool intel_has_gpu_reset(struct drm_i915_private *i915) > > if (USES_GUC(i915)) > > return false; > > > > + if (!i915_modparams.reset) > > + return NULL; > > + > > I first thought there was no functional change > in this but it is play with get and has. > > Part of the reset code complexity is the > deep nesting of 'reset' used on all > layers and you need effort to distinguish > what is prepping, driver resetting and > gpu resetting. But it is not all bad > as we have now 'gpu' popping up in places > where the actual hw is involved. The nice part about this is that it reduces the number of places that are affected by the parameter to just i915_reset() (oh, and the I915_PARAM query for has_gpu_reset). Should be far less surprising in future. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
