On Fri, 2018-12-21 at 19:14 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> On glk+ the level 0 lines watermark actually matters. Do not ignore
> it.
> And while at it let's change things so that we always program a
> consistnet 0 to the register when the lines watermarks is ignored
> by the hardware.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 2a6ffb8b975a..d132ef10fa60 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4675,6 +4675,15 @@ skl_compute_plane_wm_params(const struct
> intel_crtc_state *cstate,
> return 0;
> }
>
> +static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int
> level)
> +{
> + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + return true;
> +
> + /* The number of lines are ignored for the level 0
> watermark. */
> + return level > 0;
> +}
> +
> static void skl_compute_plane_wm(const struct intel_crtc_state
> *cstate,
> const struct intel_plane_state
> *intel_pstate,
> int level,
> @@ -4757,8 +4766,10 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> }
> }
>
> - /* The number of lines are ignored for the level 0
> watermark. */
> - if (level > 0 && res_lines > 31)
> + if (!skl_wm_has_lines(dev_priv, level))
> + res_lines = 0;
> +
> + if (res_lines > 31)
> return;
>
> /*
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
--
Best Regards,
Lisovskiy Stanislav
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