Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Always perform the requested reset, even if we believe the engine is > idle. Presumably there was a reason the caller wanted the reset, and in > the near future we lose the easy tracking for whether the engine is > idle. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reset.c | 4 ---- > .../gpu/drm/i915/selftests/intel_hangcheck.c | 22 +++++-------------- > 2 files changed, 6 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c > index 064fc6da1512..d44b095e2860 100644 > --- a/drivers/gpu/drm/i915/i915_reset.c > +++ b/drivers/gpu/drm/i915/i915_reset.c > @@ -1063,10 +1063,6 @@ int i915_reset_engine(struct intel_engine_cs *engine, const char *msg) > GEM_TRACE("%s flags=%lx\n", engine->name, error->flags); > GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags)); > > - if (i915_seqno_passed(intel_engine_get_seqno(engine), > - intel_engine_last_submit(engine))) > - return 0; It seems you reinstate this later in this series. And this patch doesn't apply as the i915_reset_engine doesn't have the idle check. -Mika > - > reset_prepare_engine(engine); > > if (msg) > diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c > index 28144fd72550..9d0cc9d63a1e 100644 > --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c > +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c > @@ -449,8 +449,6 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active) > > set_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags); > do { > - u32 seqno = intel_engine_get_seqno(engine); > - > if (active) { > struct i915_request *rq; > > @@ -479,8 +477,6 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active) > break; > } > > - GEM_BUG_ON(!rq->global_seqno); > - seqno = rq->global_seqno - 1; > i915_request_put(rq); > } > > @@ -496,11 +492,10 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active) > break; > } > > - reset_engine_count += active; > if (i915_reset_engine_count(&i915->gpu_error, engine) != > - reset_engine_count) { > - pr_err("%s engine reset %srecorded!\n", > - engine->name, active ? "not " : ""); > + ++reset_engine_count) { > + pr_err("%s engine reset not recorded!\n", > + engine->name); > err = -EINVAL; > break; > } > @@ -728,7 +723,6 @@ static int __igt_reset_engines(struct drm_i915_private *i915, > > set_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags); > do { > - u32 seqno = intel_engine_get_seqno(engine); > struct i915_request *rq = NULL; > > if (flags & TEST_ACTIVE) { > @@ -756,9 +750,6 @@ static int __igt_reset_engines(struct drm_i915_private *i915, > err = -EIO; > break; > } > - > - GEM_BUG_ON(!rq->global_seqno); > - seqno = rq->global_seqno - 1; > } > > err = i915_reset_engine(engine, NULL); > @@ -795,10 +786,9 @@ static int __igt_reset_engines(struct drm_i915_private *i915, > > reported = i915_reset_engine_count(&i915->gpu_error, engine); > reported -= threads[engine->id].resets; > - if (reported != (flags & TEST_ACTIVE ? count : 0)) { > - pr_err("i915_reset_engine(%s:%s): reset %lu times, but reported %lu, expected %lu reported\n", > - engine->name, test_name, count, reported, > - (flags & TEST_ACTIVE ? count : 0)); > + if (reported != count) { > + pr_err("i915_reset_engine(%s:%s): reset %lu times, but reported %lu\n", > + engine->name, test_name, count, reported); > if (!err) > err = -EINVAL; > } > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx