Sanitize crtc gamma and csc mode and update the mode in driver
in case BIOS has setup a different mode or gamma luts, csc with
any other unexpected values than desired. There is restriction on
HSW platform not to read/write color LUT's if ips is enabled.
Handled the same accordingly.
We don't read out the LUT's and CTM that the BIOS setup, so at the
moment they stick around for a while until they get unexpectedly
clobbered by a subsequent modeset or fastset. The change here will
basically force them to be reset to standard/linear values at startup.
Maybe in the future we'll try to actually read out and preserve the
contents of the actual LUT's and CTM that the BIOS had setup, but we
don't do that yet today, so the change here at least makes the behavior
a little bit more consistent than what it has been.
v2: Addressed Matt's review comments.
Credits-to: Matt Roper <matthew.d.roper@xxxxxxxxx>
Signed-off-by: Uma Shankar <uma.shankar@xxxxxxxxx>
Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index af164d7..56fa469 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15434,6 +15434,27 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
}
}
+ /*
+ * Sanitize gamma mode incase BIOS leaves it in SPLIT GAMMA MODE
+ * or gamma luts, csc with any other unexpected values than desired.
+ * We don't read out the LUT's and CTM that the BIOS setup, so at the
+ * moment they stick around for a while until they get unexpectedly
+ * clobbered by a subsequent modeset or fastset.
+ * The change here will basically force them to be reset to
+ * standard/linear values at startup.
+ * Workaround HSW : Do not read or write the pipe palette/gamma data
+ * while GAMMA_MODE is configured for split gamma and IPS_CTL has IPS
+ * enabled.
+ */
+ if (IS_HASWELL(dev_priv)) {
+ hsw_disable_ips(crtc_state);
+
+ intel_color_set_csc(crtc_state);
+ intel_color_load_luts(crtc_state);
+
+ hsw_enable_ips(crtc_state);
+ }
+
/* Adjust the state of the output pipe according to whether we
* have active connectors/encoders. */
if (crtc_state->base.active && !intel_crtc_has_encoders(crtc))
--
1.9.1
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