Re: [PATCH 3/3] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes

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On 11.1.2019 7.30, swati2.sharma@xxxxxxxxx wrote:
From: Swati Sharma <swati2.sharma@xxxxxxxxx>

Signed-off-by: Swati Sharma <swati2.sharma@xxxxxxxxx>
---
  drivers/gpu/drm/i915/intel_display.c | 30 ++++++++++++++++++
  drivers/gpu/drm/i915/intel_sprite.c  | 61 ++++++++++++++++++++++++++++++++++--
  2 files changed, 89 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1cc441f..e7a86c6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2633,6 +2633,18 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
  		return DRM_FORMAT_RGB565;
  	case PLANE_CTL_FORMAT_NV12:
  		return DRM_FORMAT_NV12;
+	case PLANE_CTL_FORMAT_Y210:
+		return DRM_FORMAT_Y210;
+	case PLANE_CTL_FORMAT_Y212:
+		return DRM_FORMAT_Y212;
+	case PLANE_CTL_FORMAT_Y216:
+		return DRM_FORMAT_Y216;
+	case PLANE_CTL_FORMAT_Y410:
+		return DRM_FORMAT_Y410;
+	case PLANE_CTL_FORMAT_Y412:
+		return DRM_FORMAT_Y412;
+	case PLANE_CTL_FORMAT_Y416:
+		return DRM_FORMAT_Y416;
  	default:
  	case PLANE_CTL_FORMAT_XRGB_8888:
  		if (rgb_order) {
@@ -3529,6 +3541,18 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format)
  		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
  	case DRM_FORMAT_NV12:
  		return PLANE_CTL_FORMAT_NV12;
+	case DRM_FORMAT_Y210:
+		return PLANE_CTL_FORMAT_Y210;
+	case DRM_FORMAT_Y212:
+		return PLANE_CTL_FORMAT_Y212;
+	case DRM_FORMAT_Y216:
+		return PLANE_CTL_FORMAT_Y216;
+	case DRM_FORMAT_Y410:
+		return PLANE_CTL_FORMAT_Y410;
+	case DRM_FORMAT_Y412:
+		return PLANE_CTL_FORMAT_Y412;
+	case DRM_FORMAT_Y416:
+		return PLANE_CTL_FORMAT_Y416;
  	default:
  		MISSING_CASE(pixel_format);
  	}
@@ -5022,6 +5046,12 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
  	case DRM_FORMAT_UYVY:
  	case DRM_FORMAT_VYUY:
  	case DRM_FORMAT_NV12:
+	case DRM_FORMAT_Y210:
+	case DRM_FORMAT_Y212:
+	case DRM_FORMAT_Y216:
+	case DRM_FORMAT_Y410:
+	case DRM_FORMAT_Y412:
+	case DRM_FORMAT_Y416:
  		break;
  	default:
  		DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 8f3982c..f1bc46d 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1750,6 +1750,27 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
  	DRM_FORMAT_VYUY,
  };
+static const uint32_t icl_plane_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_ABGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_YUYV,
+	DRM_FORMAT_YVYU,
+	DRM_FORMAT_UYVY,
+	DRM_FORMAT_VYUY,
+	DRM_FORMAT_Y210,
+	DRM_FORMAT_Y212,
+	DRM_FORMAT_Y216,
+	DRM_FORMAT_Y410,
+	DRM_FORMAT_Y412,
+	DRM_FORMAT_Y416,
+};
+
  static const uint32_t skl_planar_formats[] = {
  	DRM_FORMAT_C8,
  	DRM_FORMAT_RGB565,
@@ -1766,6 +1787,28 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
  	DRM_FORMAT_NV12,
  };
+static const uint32_t icl_planar_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_ABGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+	DRM_FORMAT_YUYV,
+	DRM_FORMAT_YVYU,
+	DRM_FORMAT_UYVY,
+	DRM_FORMAT_VYUY,
+	DRM_FORMAT_NV12,
+	DRM_FORMAT_Y210,
+	DRM_FORMAT_Y212,
+	DRM_FORMAT_Y216,
+	DRM_FORMAT_Y410,
+	DRM_FORMAT_Y412,
+	DRM_FORMAT_Y416,
+};
+
  static const uint64_t skl_plane_format_modifiers_noccs[] = {
  	I915_FORMAT_MOD_Yf_TILED,
  	I915_FORMAT_MOD_Y_TILED,
@@ -1904,6 +1947,12 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
  	case DRM_FORMAT_YVYU:
  	case DRM_FORMAT_UYVY:
  	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_Y210:
+	case DRM_FORMAT_Y212:
+	case DRM_FORMAT_Y216:
+	case DRM_FORMAT_Y410:
+	case DRM_FORMAT_Y412:
+	case DRM_FORMAT_Y416:
  	case DRM_FORMAT_NV12:
  		if (modifier == I915_FORMAT_MOD_Yf_TILED)
  			return true;
@@ -2045,8 +2094,16 @@ struct intel_plane *
  		plane->update_slave = icl_update_slave;
if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
-		formats = skl_planar_formats;
-		num_formats = ARRAY_SIZE(skl_planar_formats);
+		if (INTEL_GEN(dev_priv) >= 11) {
+			formats = icl_planar_formats;
+			num_formats = ARRAY_SIZE(icl_planar_formats);
+		} else {
+			formats = skl_planar_formats;
+			num_formats = ARRAY_SIZE(skl_planar_formats);
+		}
+	} else if (INTEL_GEN(dev_priv) >= 11) {
+		formats = icl_plane_formats;
+		num_formats = ARRAY_SIZE(icl_plane_formats);
  	} else {
  		formats = skl_plane_formats;
  		num_formats = ARRAY_SIZE(skl_plane_formats);


Look good to me. There will be collision with my Pxxx patches if those ever go upstream but it is issue of that time. I guess these patches will also wait for IGT support?

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@xxxxxxxxx>
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