Quoting John Harrison (2019-01-11 00:16:16) > On 1/10/2019 02:11, Chris Wilson wrote: > > Track where and when we acquire and release the power well for pps > > access along the dp aux link, with a view to detecting if we leak any > > wakerefs. > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Jani Nikula <jani.nikula@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_dp.c | 231 +++++++++++++++++--------------- > > 1 file changed, 121 insertions(+), 110 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index fc85fd77a661..db0f3a4402f5 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -601,30 +601,39 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, > > static void > > intel_dp_pps_init(struct intel_dp *intel_dp); > > > > -static void pps_lock(struct intel_dp *intel_dp) > > +static intel_wakeref_t > > +pps_lock(struct intel_dp *intel_dp) > > { > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > Any particular reason for leaving these as dev_priv when the earlier > patches converted everything in sight to i915? It usually meant I hit a I915_READ early on that dissuaded me from trying to sneak the change in, or that I didn't think it was going to be as large a conversion as it turned out to be. So no reason other than reticence. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx