On Thu, 2019-01-03 at 06:21 -0800, José Roberto de Souza wrote:
> This register contains how many blocks was sent in the past selective
> updates.
> Those registers are not kept set all the times but pulling it after
I suppose you mean 'polling'.
> flip
> can show that the expected values are set for the current frame and
> the
> previous ones too.
The values correspond to the last 8 frames actually.
>
> v2: Improved macros(Dhinakaran)
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 44958d994bfa..f9712d05314b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4272,6 +4272,15 @@ enum {
> #define EDP_PSR2_STATUS_STATE_MASK (0xf << 28)
> #define EDP_PSR2_STATUS_STATE_SHIFT 28
>
> +#define _PSR2_SU_STATUS_0 0x6F914
> +#define _PSR2_SU_STATUS_1 0x6F918
> +#define _PSR2_SU_STATUS_2 0x6F91C
> +#define _PSR2_SU_STATUS(index) _MMIO(_PICK_EVEN((index
> ), _PSR2_SU_STATUS_0, _PSR2_SU_STATUS_1))
> +#define PSR2_SU_STATUS(frame) (_PSR2_SU_STATUS((frame
> ) / 3))
> +#define PSR2_SU_STATUS_SHIFT(frame) (((frame) % 3) * 10)
> +#define PSR2_SU_STATUS_MASK(frame) (0x3ff <<
> PSR2_SU_STATUS_SHIFT(frame))
> +#define PSR2_SU_STATUS_FRAMES 8
> +
> /* VGA port control */
> #define ADPA _MMIO(0x61100)
> #define PCH_ADPA _MMIO(0xe1100)
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