Re: [v4 07/12] drm: Enable HDR infoframe support

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Hi Uma,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-HDR-Metadata-Parsing-and-handling-in-DRM-layer/20190109-051130
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=arm64 

All warnings (new ones prefixed by >>):

   drivers/gpu//drm/mediatek/mtk_hdmi.c: In function 'mtk_hdmi_hw_send_info_frame':
>> drivers/gpu//drm/mediatek/mtk_hdmi.c:327:2: warning: enumeration value 'HDMI_INFOFRAME_TYPE_DRM' not handled in switch [-Wswitch]
     switch (frame_type) {
     ^~~~~~

vim +/HDMI_INFOFRAME_TYPE_DRM +327 drivers/gpu//drm/mediatek/mtk_hdmi.c

8f83f268 Jie Qiu 2016-01-04  300  
8f83f268 Jie Qiu 2016-01-04  301  static void mtk_hdmi_hw_send_info_frame(struct mtk_hdmi *hdmi, u8 *buffer,
8f83f268 Jie Qiu 2016-01-04  302  					u8 len)
8f83f268 Jie Qiu 2016-01-04  303  {
8f83f268 Jie Qiu 2016-01-04  304  	u32 ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04  305  	int i;
8f83f268 Jie Qiu 2016-01-04  306  	u8 *frame_data;
8f83f268 Jie Qiu 2016-01-04  307  	enum hdmi_infoframe_type frame_type;
8f83f268 Jie Qiu 2016-01-04  308  	u8 frame_ver;
8f83f268 Jie Qiu 2016-01-04  309  	u8 frame_len;
8f83f268 Jie Qiu 2016-01-04  310  	u8 checksum;
8f83f268 Jie Qiu 2016-01-04  311  	int ctrl_frame_en = 0;
8f83f268 Jie Qiu 2016-01-04  312  
8f83f268 Jie Qiu 2016-01-04  313  	frame_type = *buffer;
8f83f268 Jie Qiu 2016-01-04  314  	buffer += 1;
8f83f268 Jie Qiu 2016-01-04  315  	frame_ver = *buffer;
8f83f268 Jie Qiu 2016-01-04  316  	buffer += 1;
8f83f268 Jie Qiu 2016-01-04  317  	frame_len = *buffer;
8f83f268 Jie Qiu 2016-01-04  318  	buffer += 1;
8f83f268 Jie Qiu 2016-01-04  319  	checksum = *buffer;
8f83f268 Jie Qiu 2016-01-04  320  	buffer += 1;
8f83f268 Jie Qiu 2016-01-04  321  	frame_data = buffer;
8f83f268 Jie Qiu 2016-01-04  322  
8f83f268 Jie Qiu 2016-01-04  323  	dev_dbg(hdmi->dev,
8f83f268 Jie Qiu 2016-01-04  324  		"frame_type:0x%x,frame_ver:0x%x,frame_len:0x%x,checksum:0x%x\n",
8f83f268 Jie Qiu 2016-01-04  325  		frame_type, frame_ver, frame_len, checksum);
8f83f268 Jie Qiu 2016-01-04  326  
8f83f268 Jie Qiu 2016-01-04 @327  	switch (frame_type) {
8f83f268 Jie Qiu 2016-01-04  328  	case HDMI_INFOFRAME_TYPE_AVI:
8f83f268 Jie Qiu 2016-01-04  329  		ctrl_frame_en = CTRL_AVI_EN;
8f83f268 Jie Qiu 2016-01-04  330  		ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04  331  		break;
8f83f268 Jie Qiu 2016-01-04  332  	case HDMI_INFOFRAME_TYPE_SPD:
8f83f268 Jie Qiu 2016-01-04  333  		ctrl_frame_en = CTRL_SPD_EN;
8f83f268 Jie Qiu 2016-01-04  334  		ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04  335  		break;
8f83f268 Jie Qiu 2016-01-04  336  	case HDMI_INFOFRAME_TYPE_AUDIO:
8f83f268 Jie Qiu 2016-01-04  337  		ctrl_frame_en = CTRL_AUDIO_EN;
8f83f268 Jie Qiu 2016-01-04  338  		ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04  339  		break;
8f83f268 Jie Qiu 2016-01-04  340  	case HDMI_INFOFRAME_TYPE_VENDOR:
8f83f268 Jie Qiu 2016-01-04  341  		ctrl_frame_en = VS_EN;
8f83f268 Jie Qiu 2016-01-04  342  		ctrl_reg = GRL_ACP_ISRC_CTRL;
8f83f268 Jie Qiu 2016-01-04  343  		break;
8f83f268 Jie Qiu 2016-01-04  344  	}
8f83f268 Jie Qiu 2016-01-04  345  	mtk_hdmi_clear_bits(hdmi, ctrl_reg, ctrl_frame_en);
8f83f268 Jie Qiu 2016-01-04  346  	mtk_hdmi_write(hdmi, GRL_INFOFRM_TYPE, frame_type);
8f83f268 Jie Qiu 2016-01-04  347  	mtk_hdmi_write(hdmi, GRL_INFOFRM_VER, frame_ver);
8f83f268 Jie Qiu 2016-01-04  348  	mtk_hdmi_write(hdmi, GRL_INFOFRM_LNG, frame_len);
8f83f268 Jie Qiu 2016-01-04  349  
8f83f268 Jie Qiu 2016-01-04  350  	mtk_hdmi_write(hdmi, GRL_IFM_PORT, checksum);
8f83f268 Jie Qiu 2016-01-04  351  	for (i = 0; i < frame_len; i++)
8f83f268 Jie Qiu 2016-01-04  352  		mtk_hdmi_write(hdmi, GRL_IFM_PORT, frame_data[i]);
8f83f268 Jie Qiu 2016-01-04  353  
8f83f268 Jie Qiu 2016-01-04  354  	mtk_hdmi_set_bits(hdmi, ctrl_reg, ctrl_frame_en);
8f83f268 Jie Qiu 2016-01-04  355  }
8f83f268 Jie Qiu 2016-01-04  356  

:::::: The code at line 327 was first introduced by commit
:::::: 8f83f26891e12570780dcfc8ae376b655915ff6d drm/mediatek: Add HDMI support

:::::: TO: Jie Qiu <jie.qiu@xxxxxxxxxxxx>
:::::: CC: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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