Quoting Mika Kuoppala (2018-12-28 13:48:18) > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > Quoting Patchwork (2018-12-28 13:17:50) > >> == Series Details == > >> > >> Series: series starting with [1/3] drm/i915: Implement Selective Write workaround for Haswell GT1 > >> URL : https://patchwork.freedesktop.org/series/54518/ > >> State : failure > >> > >> == Summary == > >> > >> CI Bug Log - changes from CI_DRM_5346 -> Patchwork_11162 > >> ==================================================== > >> > >> Summary > >> ------- > >> > >> **FAILURE** > >> > >> Serious unknown changes coming with Patchwork_11162 absolutely need to be > >> verified manually. > >> > >> If you think the reported changes have nothing to do with the changes > >> introduced in Patchwork_11162, please notify your bug team to allow them > >> to document this new failure mode, which will reduce false positives in CI. > >> > >> External URL: https://patchwork.freedesktop.org/api/1.0/series/54518/revisions/1/mbox/ > >> > >> Possible new issues > >> ------------------- > >> > >> Here are the unknown changes that may have been introduced in Patchwork_11162: > >> > >> ### IGT changes ### > >> > >> #### Possible regressions #### > >> > >> * igt@core_auth@basic-auth: > >> - fi-hsw-peppy: PASS -> INCOMPLETE > > > > Well, that's suspicious indeed! > > It is a GT1. It needs sleep message disable? Seems like our hack is better than the suggested workaround. It might be that we need the GPU in a certain state before touching that register, but without a better idea, I'm just going to s/HAS_SEMAPHORE/IS_HSW_GT1/ to keep the PSMI around. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
