Op 18-12-2018 om 23:29 schreef Hans de Goede: > Call intel_edp_drrs_enable() on encoder updates to make sure that we enable > DRRS (when applicable) on fastsets. > > Note calling intel_edp_drrs_enable() when PSR has already been enabled is a > no-op, so it is safe to do this on every encoder->update callback. > > Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_ddi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 30f54c334dd7..b74f3c415fbb 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -3544,6 +3544,7 @@ static void intel_update_ddi_dp(struct intel_encoder *encoder, > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > > intel_psr_enable(intel_dp, crtc_state); > + intel_edp_drrs_enable(intel_dp, crtc_state); > } > > static void intel_update_ddi(struct intel_encoder *encoder, I would merge patch 2 and 4, and rename the callback to pipe_update or something less generic than update, at least. Other than that, looks good. So with those changes: Reviewed-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> Can I convince you to review https://patchwork.freedesktop.org/series/54226/ ? Should be triggerable with kms_atomic_transition --run-subtest plane-all-modeset-transition-fencing-internal-panels See: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11112/shard-skl7/igt@kms_atomic_transition@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx At that point we should have FBC, PSR and DRRS working correctly with fastset. :) ~Maarten _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
