Our current algorithm for partitioning a pipe's DDB allocation bases plane allocations exclusively on the proportion of the pipe's data rate that the plane contributes. This is a simple heuristic that works pretty well in a lot of cases, but it breaks down when there's a large difference in plane sizes (e.g., one full-screen plane and another 100x100 plane). When sizes are very different, using proportional data rate can leave the smaller planes without enough DDB allocation to even hit their level 0 watermarks (which means the whole configuration becomes impossible), or can artificially limit how high of a watermark level the smaller planes can achieve. These problems are most visible on APL (due to the platform's smaller DDB in general). A better algorithm is to calculate watermarks first, DDB second, and use the block counts from the watermark calculation to give planes exactly the allocation they need to hit the highest possible global watermark level. Mahesh took a stab at implementing this algorithm about 1.5 years ago, but there were some bugs that led to regressions and nobody had time to track them down. Our watermark code has evolved significantly since that time, but the problems with the original datarate-proportional algorithm remain. Matt Roper (3): drm/i915: Remove a very stale FIXME drm/i915: Don't use DDB allocation when choosing gen9 watermark method drm/i915: Switch to level-based DDB allocation algorithm drivers/gpu/drm/i915/intel_pm.c | 356 ++++++++++++++-------------------------- 1 file changed, 121 insertions(+), 235 deletions(-) -- 2.14.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
