Ok, I didn't file a bug yet, because I still have suspicion that this could be a bios thing. Vandita, Madhav, did you happen to see same issue? Best Regards, Lisovskiy Stanislav Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo ________________________________________ From: Nikula, Jani Sent: Wednesday, December 05, 2018 10:35 AM To: Lisovskiy, Stanislav; Chauhan, Madhav; intel-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Peres, Martin; Saarinen, Jani Subject: RE: [PATCH v11 00/23] drm/i915/icl: dsi enabling On Wed, 05 Dec 2018, "Lisovskiy, Stanislav" <stanislav.lisovskiy@xxxxxxxxx> wrote: > I still see this pipe config mismatch(with icl-dsi-2018-12-03(4.20.0-rc5) + "fix transcoder state readout" commit applied): > > [ 12.773332] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hdisplay (expected 1440, found 720) > [ 12.773425] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_htotal (expected 1586, found 793) > [ 12.773510] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hblank_start (expected 1440, found 1) > [ 12.773588] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hblank_end (expected 1586, found 1) > [ 12.773663] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hsync_start (expected 1540, found 770) > [ 12.773735] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hsync_end (expected 1550, found 775) > [ 12.773813] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_vblank_start (expected 2560, found 1) > [ 12.773897] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_vblank_end (expected 2582, found 1) > [ 12.773976] [drm:pipe_config_err [i915]] *ERROR* mismatch in output_format (expected 0, found 1) > [ 12.774039] [drm:pipe_config_err [i915]] *ERROR* mismatch in pixel_rate (expected 245700, found 122850) > [ 12.774099] [drm:pipe_config_err [i915]] *ERROR* mismatch in pipe_bpp (expected 24, found 0) > [ 12.774157] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_clock (expected 245700, found 122850) > > To me it looks different from https://bugs.freedesktop.org/show_bug.cgi?id=108928 bug. Okay, please file a new bug with the full dmesg. The above is not enough. BR, Jani. > > Also there are still "The master control interrupt lied (DE PIPE)!" messages( Pipe IIR register is read as 0, while > master_ctl has a correspondent flag set) - however with this one I can at least cope by adding a few retries in the interrupt handler as a workaround. Then the flooding stops. Not sure if this is a proper fix though. > > I also run kms_draw_crc test with this board(investigating https://bugs.freedesktop.org/show_bug.cgi?id=103184), > and sometimes half of the tests fail with the crc mismatch, I think this is kind of different thing. > > > Best Regards, > > Lisovskiy Stanislav > > Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo > > ________________________________________ > From: Intel-gfx [intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] on behalf of Lisovskiy, Stanislav [stanislav.lisovskiy@xxxxxxxxx] > Sent: Wednesday, December 05, 2018 9:49 AM > To: Nikula, Jani; Chauhan, Madhav; intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH v11 00/23] drm/i915/icl: dsi enabling > > Hi Jani, > > I've tried previously with branch icl-dsi-2018-12-03 for your github repo. > I think it has everything except this 4.12.2018 "fix transcoder state readout" commit. > > I will apply it and try with that now, thanks. > > Best Regards, > > Lisovskiy Stanislav > > Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo > > ________________________________________ > From: Nikula, Jani > Sent: Tuesday, December 04, 2018 7:13 PM > To: Lisovskiy, Stanislav; Chauhan, Madhav; intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: ville.syrjala@xxxxxxxxxxxxxxx; Kulkarni, Vandita; Deak, Imre > Subject: RE: [PATCH v11 00/23] drm/i915/icl: dsi enabling > > On Tue, 04 Dec 2018, "Lisovskiy, Stanislav" <stanislav.lisovskiy@xxxxxxxxx> wrote: >> Hi, >> >> Currently ICL DSI panel seems to work fine, however I still face >> mainly two issues, which probably need to be addressed: > > Please try with current drm-tip with > > commit 0716931a82b4d0e211d2ef66616ad7130107e455 > Author: Jani Nikula <jani.nikula@xxxxxxxxx> > Date: Tue Dec 4 12:19:26 2018 +0200 > > drm/i915/icl: fix transcoder state readout > > plus the hack patches from the end of the series. It's possible only the > VBT one is required. > > BR, > Jani. > >> >> 1) There is still pipe_config mismatch assertion: >> >> [ 13.119965] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hdisplay (expected 1440, found 720) >> [ 13.119989] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_htotal (expected 1586, found 793) >> [ 13.120015] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hblank_start (expected 1440, found 1) >> [ 13.120038] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hblank_end (expected 1586, found 1) >> [ 13.120061] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hsync_start (expected 1540, found 770) >> [ 13.120083] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hsync_end (expected 1550, found 775) >> [ 13.120113] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_vblank_start (expected 2560, found 1) >> [ 13.120139] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_vblank_end (expected 2582, found 1) >> [ 13.120169] [drm:pipe_config_err [i915]] *ERROR* mismatch in output_format (expected 0, found 1) >> [ 13.120188] [drm:pipe_config_err [i915]] *ERROR* mismatch in pixel_rate (expected 245700, found 122850) >> [ 13.120207] [drm:pipe_config_err [i915]] *ERROR* mismatch in pipe_bpp (expected 24, found 0) >> [ 13.120225] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_clock (expected 245700, found 122850) >> >> Also whenever I run some suspend test case(for example I use igt@kms_vblank@pipe-a-ts-continuation-suspend >> I start to get it everytime machine wakes up, DSI panel get blank and doesn't recover from that. >> >> 2) During reboot, there are sometimes flood of "The master control interrupt lied (DE PIPE)!" messages visible. >> Looks like GEN8_DE_PIPE_IIR(pipe) which reads as 0 toggles this. Looks like also if I add a few retries it reads >> correctly. >> >> Could this be also because I'm still using old BIOS, which I've got initially from Vandita? >> >> Best Regards, >> >> Lisovskiy Stanislav >> >> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo >> >> ________________________________________ >> From: Chauhan, Madhav >> Sent: Tuesday, December 04, 2018 9:40 AM >> To: Nikula, Jani; intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> Cc: ville.syrjala@xxxxxxxxxxxxxxx; Kulkarni, Vandita; Lisovskiy, Stanislav; Deak, Imre >> Subject: RE: [PATCH v11 00/23] drm/i915/icl: dsi enabling >> >>> -----Original Message----- >>> From: Nikula, Jani >>> Sent: Monday, December 3, 2018 7:39 PM >>> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx >>> Cc: ville.syrjala@xxxxxxxxxxxxxxx; Chauhan, Madhav >>> <madhav.chauhan@xxxxxxxxx>; Kulkarni, Vandita >>> <vandita.kulkarni@xxxxxxxxx>; Lisovskiy, Stanislav >>> <stanislav.lisovskiy@xxxxxxxxx>; Deak, Imre <imre.deak@xxxxxxxxx> >>> Subject: Re: [PATCH v11 00/23] drm/i915/icl: dsi enabling >>> >>> On Thu, 29 Nov 2018, Jani Nikula <jani.nikula@xxxxxxxxx> wrote: >>> > v11 of [1], incorporating DSI PLL work [2] from Vandita as well as PLL >>> > mapping and gating patches [3] from me and [4] from Imre. >>> > >>> > It made sense to squash some patches in [1] and [2] together, I've >>> > tried to set authorship and co-developed-by tags fairly. >>> > >>> > The series is also available in icl-dsi-2018-11-29 branch of my fdo >>> > git repo [5]. >>> >>> Pushed the series to dinq except for the three HACK patches at the end. >>> They'll still need to be addressed one way or another. >>> >>> Thanks everyone for your contributions in writing the patches, reviewing, >>> testing, etc. It's been a long ride! >> >> Thanks a lot to you as well Jani N for your continuous support during design/development/review/merge >> Of this new/big feature :) >> >> Regards, >> Madhav >> >>> >>> BR, >>> Jani. >>> >>> >>> >>> > >>> > >>> > BR, >>> > Jani. >>> > >>> > >>> > [1] https://patchwork.freedesktop.org/series/51011/ >>> > [2] https://patchwork.freedesktop.org/series/51373/ >>> > [3] >>> > http://patchwork.freedesktop.org/patch/msgid/20181129115715.9152-1- >>> jan >>> > i.nikula@xxxxxxxxx [4] >>> > http://patchwork.freedesktop.org/patch/msgid/20181127163606.28841-1- >>> im >>> > re.deak@xxxxxxxxx [5] https://cgit.freedesktop.org/~jani/drm/ >>> > >>> > >>> > Imre Deak (1): >>> > drm/i915/icl: Sanitize DDI port clock gating for DSI ports >>> > >>> > Jani Nikula (4): >>> > drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooks >>> > drm/i915/icl: add dummy DSI GPIO element execution function >>> > drm/i915/icl: add pll mapping for DSI >>> > HACK: drm/i915/bios: ignore VBT not overflowing the mailbox >>> > >>> > Madhav Chauhan (16): >>> > drm/i915/icl: Calculate DPLL params for DSI >>> > drm/i915/icl: Allocate DSI encoder/connector >>> > drm/i915/icl: Fill DSI ports info >>> > drm/i915/icl: Allocate DSI hosts and imlement host transfer >>> > drm/i915/icl: Get HW state for DSI encoder >>> > drm/i915/icl: Add DSI encoder compute config hook >>> > drm/i915/icl: Configure DSI Dual link mode >>> > drm/i915/icl: Consider DSI for getting transcoder state >>> > drm/i915/icl: Get pipe timings for DSI >>> > drm/i915/icl: Define missing bitfield for shortplug reg >>> > drm/i915/icl: Define Panel power ctrl register >>> > drm/i915/icl: Define display GPIO pins for DSI >>> > drm/i915/icl: Gate clocks for DSI >>> > drm/i915/icl: Ungate DSI clocks >>> > HACK: drm/i915/icl: Add changes to program DSI panel GPIOs >>> > HACK: drm/i915/icl: Configure backlight functions for DSI >>> > >>> > Vandita Kulkarni (2): >>> > drm/i915/icl: Use the same pll functions for dsi >>> > drm/i915/icl: Add get config functionality for DSI >>> > >>> > drivers/gpu/drm/i915/i915_reg.h | 12 + >>> > drivers/gpu/drm/i915/icl_dsi.c | 492 >>> +++++++++++++++++++++++++++++++++- >>> > drivers/gpu/drm/i915/intel_bios.c | 1 - >>> > drivers/gpu/drm/i915/intel_ddi.c | 153 ++++++----- >>> > drivers/gpu/drm/i915/intel_display.c | 44 +-- >>> > drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 +- >>> > drivers/gpu/drm/i915/intel_drv.h | 8 +- >>> > drivers/gpu/drm/i915/intel_dsi.h | 5 + >>> > drivers/gpu/drm/i915/intel_dsi_vbt.c | 58 +++- >>> > drivers/gpu/drm/i915/intel_panel.c | 3 +- >>> > 10 files changed, 674 insertions(+), 105 deletions(-) >>> >>> -- >>> Jani Nikula, Intel Open Source Graphics Center >> > > -- > Jani Nikula, Intel Open Source Graphics Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
