>-----Original Message----- >From: Chris Wilson [mailto:chris@xxxxxxxxxxxxxxxxxx] >Sent: Tuesday, November 20, 2018 12:25 PM >To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx >Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>; Jani Nikula ><jani.nikula@xxxxxxxxxxxxxxx>; Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>; >Navare, Manasi D <manasi.d.navare@xxxxxxxxx>; Srivatsa, Anusha ><anusha.srivatsa@xxxxxxxxx> >Subject: [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting > >Always show the FEC capability as it is initialised to 0 before error. >Fixing, > >drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: >inconsistent indenting > >Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register") >Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> >Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> >Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> >Cc: Manasi Navare <manasi.d.navare@xxxxxxxxx> >Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> Thanks for the fix and the above mentioned changes. Looks good. Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> >--- > drivers/gpu/drm/i915/intel_dp.c | 13 ++++++------- > 1 file changed, 6 insertions(+), 7 deletions(-) > >diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >index 7699f9b7b2d2..de6c982b1d1e 100644 >--- a/drivers/gpu/drm/i915/intel_dp.c >+++ b/drivers/gpu/drm/i915/intel_dp.c >@@ -3837,15 +3837,14 @@ static void intel_dp_get_dsc_sink_cap(struct >intel_dp *intel_dp) > DRM_DEBUG_KMS("DSC DPCD: %*ph\n", > (int)sizeof(intel_dp->dsc_dpcd), > intel_dp->dsc_dpcd); >+ > /* FEC is supported only on DP 1.4 */ >- if (!intel_dp_is_edp(intel_dp)) { >- if (drm_dp_dpcd_readb(&intel_dp->aux, >DP_FEC_CAPABILITY, >- &intel_dp->fec_capable) < 0) >- DRM_ERROR("Failed to read FEC DPCD >register\n"); >+ if (!intel_dp_is_edp(intel_dp) && >+ drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY, >+ &intel_dp->fec_capable) < 0) >+ DRM_ERROR("Failed to read FEC DPCD register\n"); > >- DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", >- intel_dp->fec_capable); >- } >+ DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp- >>fec_capable); > } > } > >-- >2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
