Quoting Mika Kuoppala (2018-12-03 12:05:25) > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > Ensure that the sync registers are cleared every time we restart the > > ring to avoid stale values from creeping in from random neutrinos. > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > index 992889f9e0ff..81b10d85b738 100644 > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -529,6 +529,13 @@ static int init_ring_common(struct intel_engine_cs *engine) > > > > intel_engine_reset_breadcrumbs(engine); > > > > + if (HAS_LEGACY_SEMAPHORES(engine->i915)) { > > + I915_WRITE(RING_SYNC_0(engine->mmio_base), 0); > > + I915_WRITE(RING_SYNC_1(engine->mmio_base), 0); > > + if (HAS_VEBOX(dev_priv)) > > Minor nitpick: mixed i915 and dev_priv usage. I don't think you are ready yet for i915_write32(i915, reg, value). :-p -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx