Quoting Tvrtko Ursulin (2018-12-03 11:46:16) > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Convert the per context workaround handling code to run against the newly > introduced common workaround framework and fuse the two to use the > existing smarter list add helper, the one which does the sorted insert and > merges registers where possible. > > This completes migration of all four classes of workarounds onto the > common framework. > > Existing macros are kept untouched for smaller code churn. > > v2: > * Rename to list name ctx_wa_list and move from dev_priv to engine. > > v3: > * API rename and parameters tweaking. (Chris Wilson) > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 12 +- > drivers/gpu/drm/i915/i915_drv.h | 15 - > drivers/gpu/drm/i915/i915_gem_context.c | 6 +- > drivers/gpu/drm/i915/intel_engine_cs.c | 1 + > drivers/gpu/drm/i915/intel_lrc.c | 2 +- > drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- > drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + > drivers/gpu/drm/i915/intel_workarounds.c | 334 +++++++++++------------ > drivers/gpu/drm/i915/intel_workarounds.h | 5 +- > 9 files changed, 168 insertions(+), 210 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 129b9a6f8309..38dcee1ca062 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -3375,13 +3375,15 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused) > > static int i915_wa_registers(struct seq_file *m, void *unused) > { > - struct i915_workarounds *wa = &node_to_i915(m->private)->workarounds; > - int i; > + struct drm_i915_private *i915 = node_to_i915(m->private); > + const struct i915_wa_list *wal = &i915->engine[RCS]->ctx_wa_list; > + struct i915_wa *wa; > + unsigned int i; You keep telling me to be defensive around the existence of RCS :) > > - seq_printf(m, "Workarounds applied: %d\n", wa->count); > - for (i = 0; i < wa->count; ++i) > + seq_printf(m, "Workarounds applied: %u\n", wal->count); > + for (i = 0, wa = wal->list; i < wal->count; i++, wa++) > seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n", > - wa->reg[i].addr, wa->reg[i].value, wa->reg[i].mask); > + i915_mmio_reg_offset(wa->reg), wa->val, wa->mask); > > return 0; > } > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c > index 0350513bf7f7..ee220a031741 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c Lgtm, Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx