== Series Details == Series: series starting with [CI,v12,01/23] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities URL : https://patchwork.freedesktop.org/series/53113/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7a0e6f477712 drm/dsc: Modify DRM helper to return complete DSC color depth capabilities ea7d0af71145 drm/dsc: Define Display Stream Compression PPS infoframe -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 342 lines checked 5a10579136d2 drm/dsc: Define VESA Display Stream Compression Capabilities -:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by: #34: Co-developed-by: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx> -:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #73: FILE: include/drm/drm_dsc.h:40: + bool convert_rgb; -:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #83: FILE: include/drm/drm_dsc.h:50: + bool enable422; -:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #108: FILE: include/drm/drm_dsc.h:75: + bool block_pred_enable; -:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #136: FILE: include/drm/drm_dsc.h:103: + bool vbr_enable; -:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #151: FILE: include/drm/drm_dsc.h:118: + bool native_422; -:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #153: FILE: include/drm/drm_dsc.h:120: + bool native_420; total: 0 errors, 1 warnings, 6 checks, 121 lines checked 997353e778c6 drm/dsc: Define Rate Control values that do not change over configurations -:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx>' total: 0 errors, 1 warnings, 0 checks, 12 lines checked 9d11c6b79b15 drm/dsc: Add helpers for DSC picture parameter set infoframes -:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #79: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 285 lines checked 86063cff9200 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants e84e030e63eb drm/i915/dp: Add DSC params and DSC config to intel_crtc_state -:49: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #49: FILE: drivers/gpu/drm/i915/intel_drv.h:943: + bool compression_enable; -:50: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #50: FILE: drivers/gpu/drm/i915/intel_drv.h:944: + bool dsc_split; total: 0 errors, 0 warnings, 2 checks, 22 lines checked 515ca97957b0 drm/i915/dp: Compute DSC pipe config in atomic check 8eaadf4ee2f3 drm/i915/dp: Do not enable PSR2 if DSC is enabled 5da78eb1b699 drm/i915/dsc: Define & Compute VESA DSC params -:68: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by: #68: Co-developed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> -:95: WARNING:MISSING_SPACE: break quoted strings at a space character #95: FILE: drivers/gpu/drm/i915/intel_dp.c:1958: + DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d" + "Compressed BPP = %d\n", -:119: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #119: new file mode 100644 -:405: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #405: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282: +} +}; total: 0 errors, 3 warnings, 1 checks, 496 lines checked 5a4aa749bcea drm/i915/dsc: Compute Rate Control parameters for DSC -:141: CHECK:SPACING: space preferred before that '*' (ctx:VxE) #141: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411: + vdsc_cfg->slice_bpg_offset)* ^ -:173: CHECK:LINE_SPACING: Please don't use multiple blank lines #173: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443: + + total: 0 errors, 0 warnings, 2 checks, 136 lines checked c3e3d9cb6b67 drm/i915/dp: Enable/Disable DSC in DP Sink 45b31fa193ee drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI f8773070bae7 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling -:347: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #347: FILE: drivers/gpu/drm/i915/intel_vdsc.c:853: + rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] << ^ -:350: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #350: FILE: drivers/gpu/drm/i915/intel_vdsc.c:856: + rc_buf_thresh_dword[i/4]); ^ -:391: WARNING:LONG_LINE: line over 100 characters #391: FILE: drivers/gpu/drm/i915/intel_vdsc.c:897: + rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << -:391: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #391: FILE: drivers/gpu/drm/i915/intel_vdsc.c:897: + rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << ^ -:398: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #398: FILE: drivers/gpu/drm/i915/intel_vdsc.c:904: + rc_range_params_dword[i/2]); ^ -:476: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #476: FILE: drivers/gpu/drm/i915/intel_vdsc.c:982: +{ + -:483: WARNING:RETURN_VOID: void function return statements are not generally useful #483: FILE: drivers/gpu/drm/i915/intel_vdsc.c:989: + return; +} total: 0 errors, 2 warnings, 5 checks, 429 lines checked 1f07378353b9 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs e95a9ab97cb9 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes 6bbec3a991c6 drm/i915/dp: Configure Display stream splitter registers during DSC enable 22be2d18f427 drm/i915/dp: Disable DSC in source by disabling DSS CTL bits 146fc028c63b drm/i915/dsc: Enable and disable appropriate power wells for VDSC 5d9589b73cf3 i915/dp/fec: Add fec_enable to the crtc state. -:125: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #125: FILE: drivers/gpu/drm/i915/intel_drv.h:951: + bool fec_enable; total: 0 errors, 0 warnings, 1 checks, 64 lines checked c76984aa6e6e drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION fbd778a69e5b i915/dp/fec: Configure the Forward Error Correction bits. a79d7adf1fd1 drm/i915/fec: Disable FEC state. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
