DSC specification defines linebuf_depth which contains the line buffer bit depth used to generate the bitstream. These values are defined as per Table 4.1 in DSC 1.2 spec v2 (From Manasi): * Rename as MAX_LINEBUF_DEPTH for DSC 1.1 and DSC 1.2 Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Signed-off-by: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> --- include/drm/drm_dsc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 52e57ceaff80..d03f1b83421a 100644 --- a/include/drm/drm_dsc.h +++ b/include/drm/drm_dsc.h @@ -40,6 +40,9 @@ #define DSC_PPS_RC_RANGE_MINQP_SHIFT 11 #define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6 #define DSC_PPS_NATIVE_420_SHIFT 1 +#define DSC_1_2_MAX_LINEBUF_DEPTH_BITS 16 +#define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0 +#define DSC_1_1_MAX_LINEBUF_DEPTH_BITS 13 /* Configuration for a single Rate Control model range */ struct drm_dsc_rc_range_parameters { -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx