Hello Anusha Srivatsa,
The patch 08cadae8e157: "i915/dp/fec: Cache the FEC_CAPABLE DPCD
register" from Nov 1, 2018, leads to the following static checker
warning:
drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap()
warn: inconsistent indenting
drivers/gpu/drm/i915/intel_dp.c
3817 static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
3818 {
3819 /*
3820 * Clear the cached register set to avoid using stale values
3821 * for the sinks that do not support DSC.
3822 */
3823 memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
3824
3825 /* Clear fec_capable to avoid using stale values */
3826 intel_dp->fec_capable = 0;
3827
3828 /* Cache the DSC DPCD if eDP or DP rev >= 1.4 */
3829 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x14 ||
3830 intel_dp->edp_dpcd[0] >= DP_EDP_14) {
3831 if (drm_dp_dpcd_read(&intel_dp->aux, DP_DSC_SUPPORT,
3832 intel_dp->dsc_dpcd,
3833 sizeof(intel_dp->dsc_dpcd)) < 0)
3834 DRM_ERROR("Failed to read DPCD register 0x%x\n",
3835 DP_DSC_SUPPORT);
3836
3837 DRM_DEBUG_KMS("DSC DPCD: %*ph\n",
3838 (int)sizeof(intel_dp->dsc_dpcd),
3839 intel_dp->dsc_dpcd);
3840 /* FEC is supported only on DP 1.4 */
3841 if (!intel_dp_is_edp(intel_dp)) {
3842 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
3843 &intel_dp->fec_capable) < 0)
3844 DRM_ERROR("Failed to read FEC DPCD register\n");
3845
3846 DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
3847 intel_dp->fec_capable);
Probably this was suppose to be outside the braces? It's hard to say...
3848 }
3849 }
3850 }
regards,
dan carpenter
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
